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- ...pcodes:OUT|OUT]],[[Z80:Opcodes:OUTD|OUTD]],[[Z80:Opcodes:OTDR|OTDR]],[[Z80:Opcodes:OTIR|OTIR]] [[Category:Z80 Assembly]]853 bytes (136 words) - 22:42, 5 February 2016
- Repeats [[Z80:Opcodes:CPD|CPD]] until either: Note if you used [[Z80:Opcodes:CPIR|CPIR]] it would find the first occurrence of 124 in the valid memory s1 KB (181 words) - 21:59, 5 February 2016
- ...pcodes:OTIR|OTIR]],[[Z80:Opcodes:OUT|OUT]],[[Z80:Opcodes:OUTD|OUTD]],[[Z80:Opcodes:OUTI|OUTI]] [[Category:Z80 Assembly]]864 bytes (137 words) - 22:21, 5 February 2016
- ...[Z80:Opcodes:CPIR|CPIR]],[[Z80:Opcodes:JP|JP]],[[Z80:Opcodes:JR|JR]],[[Z80:Opcodes:RET|RET]] [[Category:Z80 Assembly]]1 KB (226 words) - 22:06, 5 February 2016
- ...t use of AND is in bit-masking. For more information on bit-masking, see [[Z80:Flags and Bit-Level Instructions|here]]. ...80:Opcodes:RES|RES]],[[Z80:Opcodes:SCF|SCF]],[[Z80:Opcodes:SET|SET]],[[Z80:Opcodes:XOR|XOR]]1 KB (193 words) - 07:50, 6 February 2016
- Like [[Z80:Opcodes:RLD|RLD]], except rotation is rightward. ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]756 bytes (118 words) - 22:15, 5 February 2016
- Performs [[Z80:Opcodes:RLC|RLC A]] much quicker, and modifies the flags differently. ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]859 bytes (136 words) - 22:36, 5 February 2016
- Performs an [[Z80:Opcodes:RL|RL A]], but is much faster and S, Z, and P/V flags are preserved. ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]901 bytes (150 words) - 22:42, 5 February 2016
- ...pcodes:OUT|OUT]],[[Z80:Opcodes:OTDR|OTDR]],[[Z80:Opcodes:OUTI|OUTI]],[[Z80:Opcodes:OTIR|OTIR]] [[Category:Z80 Assembly]]831 bytes (134 words) - 22:00, 5 February 2016
- Here is a page for instructions that you can use in a z80 processor. Click on the instruction to gain more information about the spec * [[Z80:Opcodes:ADC|ADC]]2 KB (309 words) - 22:21, 5 February 2016
- ...be set to interrupt mode 1 (OS interrupts) or interrupt mode 2 using [[Z80:Opcodes:IM|IM]]. Be sure to re-enable interrupt mode 1 before returning to the OS. ...:Opcodes:IM|IM]],[[Z80:Opcodes:RETI|RETI]],[[Z80:Opcodes:RETN|RETN]],[[Z80:Opcodes:RST|RST]]542 bytes (76 words) - 22:07, 5 February 2016
- Performs a [[Z80:Opcodes:RRC|RRC A]] faster and modifies the flags differently. ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]899 bytes (144 words) - 22:29, 5 February 2016
- Not used by TI calculators, but means that an external device plugged into a z80 device generates the interrupt. ...and 150). Every time an interrupt is encountered, the OS performs an [[Z80:Opcodes:RST|RST]] $28.2 KB (248 words) - 22:15, 5 February 2016
- ...[Z80:Opcodes:OR|OR]],[[Z80:Opcodes:RES|RES]],[[Z80:Opcodes:SCF|SCF]],[[Z80:Opcodes:XOR|XOR]] [[Category:Z80 Assembly]]899 bytes (142 words) - 22:37, 5 February 2016
- ...pcodes:CPI|CPI]],[[Z80:Opcodes:CPIR|CPIR]],[[Z80:Opcodes:RETI|RETI]],[[Z80:Opcodes:RETN|RETN]] [[Category:Z80 Assembly]]1 KB (211 words) - 22:43, 5 February 2016
- ...80:Opcodes:IM|IM]],[[Z80:Opcodes:RET|RET]],[[Z80:Opcodes:RETI|RETI]],[[Z80:Opcodes:RETN|RETN]] [[Category:Z80 Assembly]]1,013 bytes (146 words) - 22:00, 5 February 2016
- ...[Z80:Opcodes:DJNZ|DJNZ]],[[Z80:Opcodes:JP|JP]],[[Z80:Opcodes:JR|JR]],[[Z80:Opcodes:RET|RET]] [[Category:Z80 Assembly]]2 KB (249 words) - 22:22, 5 February 2016
- ...pcodes:OUT|OUT]],[[Z80:Opcodes:OUTD|OUTD]],[[Z80:Opcodes:OTDR|OTDR]],[[Z80:Opcodes:OUTI|OUTI]] [[Category:Z80 Assembly]]850 bytes (132 words) - 22:07, 5 February 2016
- [[Z80:Opcodes:CPL|CPL]],[[Z80:Opcodes:SUB|SUB]] [[Category:Z80 Assembly]]677 bytes (97 words) - 22:30, 5 February 2016
- ...pcodes:OTIR|OTIR]],[[Z80:Opcodes:OUT|OUT]],[[Z80:Opcodes:OUTD|OUTD]],[[Z80:Opcodes:OUTI|OUTI]] [[Category:Z80 Assembly]]866 bytes (137 words) - 22:16, 5 February 2016
Page text matches
- ...inc c]] || [[Z80:Opcodes:DEC|dec c]] || [[Z80:Opcodes:LD|ld c,x]] || [[Z80:Opcodes:RRCA|rrca]] ...inc e]] || [[Z80:Opcodes:DEC|dec e]] || [[Z80:Opcodes:LD|ld e,x]] || [[Z80:Opcodes:RRA|rra]]19 KB (3,362 words) - 08:19, 6 February 2016
- Here is a page for instructions that you can use in a z80 processor. Click on the instruction to gain more information about the spec * [[Z80:Opcodes:ADC|ADC]]2 KB (309 words) - 22:21, 5 February 2016
- ...ber in [[Z80:Control Structures|Control Structures]] how we used the [[Z80:Opcodes:CP|CP]] instruction? This instruction subtracts the operand from the accumu ...lags in some way or another. For a list of system flags you can use, see [[Z80:System Flags|here]].12 KB (2,030 words) - 08:02, 6 February 2016
- '''[[z80:Tutorials|Tutorials]]''' '''[[z80:Appendices|Appendices]]'''4 KB (510 words) - 08:18, 6 February 2016
- ...ports. For a list of ports and the corresponding hardware item, see this [[Z80:Ports|page]]. ...NIR|INIR]], [[Z80:Opcodes:OTIR|OTIR]], [[Z80:Opcodes:INDR|INDR]], or [[Z80:Opcodes:OTDR|OTDR]].17 KB (2,951 words) - 08:25, 6 February 2016
- * Iambian's [http://iambianet.freewebpage.org/t/asm06.html Some (z80) Assembly Required Controlling Flow] ...real world. So, we need to apply this idea of conditions into programming. Z80 has 2 uses conditions:10 KB (1,600 words) - 07:57, 6 February 2016
- === [[Z80:Buffer Tables|Buffer Tables]] === === [[Z80:Character Maps|Character Maps]] ===2 KB (212 words) - 07:40, 6 February 2016
- An "undocumented" instruction. Functions like [[Z80:Opcodes:SLA|SLA]], except a 1 is inserted into the low bit. r denotes 8-bit register. IX and IY values assumed from [[Z80:Opcodes:SLA|SLA]]. Needs confirmation.1 KB (167 words) - 22:09, 5 February 2016
- ...pts: hardware and software. Software interrupts are triggered by the [[Z80:Opcodes:RST|RST]] command, and won't be discussed in this tutorial. Examples of har * [[Z80:Grey Scale|grayscale]]7 KB (1,090 words) - 06:16, 5 February 2016
- Performs a [[Z80:Opcodes:RRC|RRC A]] faster and modifies the flags differently. ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]899 bytes (144 words) - 22:29, 5 February 2016
- Performs [[Z80:Opcodes:RLC|RLC A]] much quicker, and modifies the flags differently. ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]859 bytes (136 words) - 22:36, 5 February 2016
- Performs a [[Z80:Opcodes:RR|RR A]] faster, and modifies the flags differently. ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]900 bytes (144 words) - 22:37, 5 February 2016
- Performs an [[Z80:Opcodes:RL|RL A]], but is much faster and S, Z, and P/V flags are preserved. ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]901 bytes (150 words) - 22:42, 5 February 2016
- Like [[Z80:Opcodes:RLD|RLD]], except rotation is rightward. ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]756 bytes (118 words) - 22:15, 5 February 2016
- Like [[Z80:Opcodes:SRA|SRA]], except a 0 is put into bit 7. The bits are all shifted right, wi ...pcodes:RRD|RRD]],[[Z80:Opcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]]1 KB (183 words) - 22:28, 5 February 2016
- ...80:Opcodes:RES|RES]],[[Z80:Opcodes:SCF|SCF]],[[Z80:Opcodes:SET|SET]],[[Z80:Opcodes:XOR|XOR]] [[Category:Z80 Assembly]]1 KB (224 words) - 22:37, 5 February 2016
- ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]] [[Category:Z80 Assembly]]1 KB (202 words) - 22:08, 5 February 2016
- ...pcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]] [[Category:Z80 Assembly]]1 KB (185 words) - 22:16, 5 February 2016
- ...pcodes:RRD|RRD]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]] [[Category:Z80 Assembly]]1 KB (177 words) - 22:28, 10 March 2017
- ...pcodes:RRD|RRD]],[[Z80:Opcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRL|SRL]] [[Category:Z80 Assembly]]1 KB (171 words) - 22:12, 10 March 2017