Difference between revisions of "Z80:Opcode Reference Chart"

From Learn @ Cemetech
Jump to navigationJump to search
 
(3 intermediate revisions by 2 users not shown)
Line 8: Line 8:
 
! !! 0 !! 1 !! 2 !! 3 !! 4 !! 5 !! 6 !! 7 !! 8 !! 9 !! A !! B !! C !! D !! E !! F  
 
! !! 0 !! 1 !! 2 !! 3 !! 4 !! 5 !! 6 !! 7 !! 8 !! 9 !! A !! B !! C !! D !! E !! F  
 
|-
 
|-
! 0 || [[Z80:Opcodes:nop|nop]] || [[Z80:Opcodes:ld|ld bc,xx]] || [[Z80:Opcodes:ld|ld (bc),a]] || [[Z80:Opcodes:inc|inc bc]] || [[Z80:Opcodes:inc|inc b]] || [[Z80:Opcodes:dec|dec b]] || [[Z80:Opcodes:ld|ld b,x]] || [[Z80:Opcodes:rlca|rlca]] || [[Z80:Opcodes:ex|ex af,af']] || [[Z80:Opcodes:add|add hl,bc]] || [[Z80:Opcodes:ld|ld a,(bc)]] || [[Z80:Opcodes:dec|dec bc]] || [[Z80:Opcodes:inc|inc c]] || [[Z80:Opcodes:dec|dec c]] || [[Z80:Opcodes:ld|ld c,x]] || [[Z80:Opcodes:rrca|rrca]]  
+
| 0 || [[Z80:Opcodes:NOP|nop]] || [[Z80:Opcodes:LD|ld bc,xx]] || [[Z80:Opcodes:LD|ld (bc),a]] || [[Z80:Opcodes:INC|inc bc]] || [[Z80:Opcodes:INC|inc b]] || [[Z80:Opcodes:DEC|dec b]] || [[Z80:Opcodes:LD|ld b,x]] || [[Z80:Opcodes:RLCA|rlca]] || [[Z80:Opcodes:EX|ex af,af']] || [[Z80:Opcodes:ADD|add hl,bc]] || [[Z80:Opcodes:LD|ld a,(bc)]] || [[Z80:Opcodes:DEC|dec bc]] || [[Z80:Opcodes:INC|inc c]] || [[Z80:Opcodes:DEC|dec c]] || [[Z80:Opcodes:LD|ld c,x]] || [[Z80:Opcodes:RRCA|rrca]]  
 
|-
 
|-
! 1 || [[Z80:Opcodes:djnz|djnz x]] || [[Z80:Opcodes:ld|ld de,xx]] || [[Z80:Opcodes:ld|ld (de),a]] || [[Z80:Opcodes:inc|inc de]] || [[Z80:Opcodes:inc|inc d]] || [[Z80:Opcodes:dec|dec d]] || [[Z80:Opcodes:ld|ld d,x]] || [[Z80:Opcodes:rla|rla]] || [[Z80:Opcodes:jr|jr x]] || [[Z80:Opcodes:add|add hl,de]] || [[Z80:Opcodes:ld|ld a,(de)]] || [[Z80:Opcodes:dec|dec de]] || [[Z80:Opcodes:inc|inc e]] || [[Z80:Opcodes:dec|dec e]] || [[Z80:Opcodes:ld|ld e,x]] || [[Z80:Opcodes:rra|rra]]  
+
| 1 || [[Z80:Opcodes:DJNZ|djnz x]] || [[Z80:Opcodes:LD|ld de,xx]] || [[Z80:Opcodes:LD|ld (de),a]] || [[Z80:Opcodes:INC|inc de]] || [[Z80:Opcodes:INC|inc d]] || [[Z80:Opcodes:DEC|dec d]] || [[Z80:Opcodes:LD|ld d,x]] || [[Z80:Opcodes:RLA|rla]] || [[Z80:Opcodes:JR|jr x]] || [[Z80:Opcodes:ADD|add hl,de]] || [[Z80:Opcodes:LD|ld a,(de)]] || [[Z80:Opcodes:DEC|dec de]] || [[Z80:Opcodes:INC|inc e]] || [[Z80:Opcodes:DEC|dec e]] || [[Z80:Opcodes:LD|ld e,x]] || [[Z80:Opcodes:RRA|rra]]  
 
|-
 
|-
! 2 || [[Z80:Opcodes:jr|jr nz,x]] || [[Z80:Opcodes:ld|ld hl,xx]] || [[Z80:Opcodes:ld|ld (xx),hl]] || [[Z80:Opcodes:inc|inc hl]] || [[Z80:Opcodes:inc|inc h]] || [[Z80:Opcodes:dec|dec h]] || [[Z80:Opcodes:ld|ld h,x]] || [[Z80:Opcodes:daa|daa]] || [[Z80:Opcodes:jr|jr z,x]] || [[Z80:Opcodes:add|add hl,hl]] || [[Z80:Opcodes:ld|ld hl,(xx)]] || [[Z80:Opcodes:dec|dec hl]] || [[Z80:Opcodes:inc|inc l]] || [[Z80:Opcodes:dec|dec l]] || [[Z80:Opcodes:ld|ld l,x]] || [[Z80:Opcodes:cpl|cpl]]  
+
| 2 || [[Z80:Opcodes:JR|jr nz,x]] || [[Z80:Opcodes:LD|ld hl,xx]] || [[Z80:Opcodes:LD|ld (xx),hl]] || [[Z80:Opcodes:INC|inc hl]] || [[Z80:Opcodes:INC|inc h]] || [[Z80:Opcodes:DEC|dec h]] || [[Z80:Opcodes:LD|ld h,x]] || [[Z80:Opcodes:DAA|daa]] || [[Z80:Opcodes:JR|jr z,x]] || [[Z80:Opcodes:ADD|add hl,hl]] || [[Z80:Opcodes:LD|ld hl,(xx)]] || [[Z80:Opcodes:DEC|dec hl]] || [[Z80:Opcodes:INC|inc l]] || [[Z80:Opcodes:DEC|dec l]] || [[Z80:Opcodes:LD|ld l,x]] || [[Z80:Opcodes:CPL|cpl]]  
 
|-
 
|-
! 3 || [[Z80:Opcodes:jr|jr nc,x]] || [[Z80:Opcodes:ld|ld sp,xx]] || [[Z80:Opcodes:ld|ld (xx),a]] || [[Z80:Opcodes:inc|inc sp]] || [[Z80:Opcodes:inc|inc (hl)]] || [[Z80:Opcodes:dec|dec (hl)]] || [[Z80:Opcodes:ld|ld (hl),x]] || [[Z80:Opcodes:scf|scf]] || [[Z80:Opcodes:jr|jr c,x]] || [[Z80:Opcodes:add|add hl,sp]] || [[Z80:Opcodes:ld|ld a,(xx)]] || [[Z80:Opcodes:dec|dec sp]] || [[Z80:Opcodes:inc|inc a]] || [[Z80:Opcodes:dec|dec a]] || [[Z80:Opcodes:ld|ld a,x]] || [[Z80:Opcodes:ccf|ccf]]  
+
| 3 || [[Z80:Opcodes:JR|jr nc,x]] || [[Z80:Opcodes:LD|ld sp,xx]] || [[Z80:Opcodes:LD|ld (xx),a]] || [[Z80:Opcodes:INC|inc sp]] || [[Z80:Opcodes:INC|inc (hl)]] || [[Z80:Opcodes:DEC|dec (hl)]] || [[Z80:Opcodes:LD|ld (hl),x]] || [[Z80:Opcodes:SCF|scf]] || [[Z80:Opcodes:JR|jr c,x]] || [[Z80:Opcodes:ADD|add hl,sp]] || [[Z80:Opcodes:LD|ld a,(xx)]] || [[Z80:Opcodes:DEC|dec sp]] || [[Z80:Opcodes:INC|inc a]] || [[Z80:Opcodes:DEC|dec a]] || [[Z80:Opcodes:LD|ld a,x]] || [[Z80:Opcodes:CCF|ccf]]  
 
|-
 
|-
! 4 || [[Z80:Opcodes:ld|ld b,b]] || [[Z80:Opcodes:ld|ld b,c]] || [[Z80:Opcodes:ld|ld b,d]] || [[Z80:Opcodes:ld|ld b,e]] || [[Z80:Opcodes:ld|ld b,h]] || [[Z80:Opcodes:ld|ld b,l]] || [[Z80:Opcodes:ld|ld b,(hl)]] || [[Z80:Opcodes:ld|ld b,a]] || [[Z80:Opcodes:ld|ld c,b]] || [[Z80:Opcodes:ld|ld c,c]] || [[Z80:Opcodes:ld|ld c,d]] || [[Z80:Opcodes:ld|ld c,e]] || [[Z80:Opcodes:ld|ld c,h]] || [[Z80:Opcodes:ld|ld c,l]] || [[Z80:Opcodes:ld|ld c,(hl)]] || [[Z80:Opcodes:ld|ld c,a]]  
+
| 4 || [[Z80:Opcodes:LD|ld b,b]] || [[Z80:Opcodes:LD|ld b,c]] || [[Z80:Opcodes:LD|ld b,d]] || [[Z80:Opcodes:LD|ld b,e]] || [[Z80:Opcodes:LD|ld b,h]] || [[Z80:Opcodes:LD|ld b,l]] || [[Z80:Opcodes:LD|ld b,(hl)]] || [[Z80:Opcodes:LD|ld b,a]] || [[Z80:Opcodes:LD|ld c,b]] || [[Z80:Opcodes:LD|ld c,c]] || [[Z80:Opcodes:LD|ld c,d]] || [[Z80:Opcodes:LD|ld c,e]] || [[Z80:Opcodes:LD|ld c,h]] || [[Z80:Opcodes:LD|ld c,l]] || [[Z80:Opcodes:LD|ld c,(hl)]] || [[Z80:Opcodes:LD|ld c,a]]  
 
|-
 
|-
! 5 || [[Z80:Opcodes:ld|ld d,b]] || [[Z80:Opcodes:ld|ld d,c]] || [[Z80:Opcodes:ld|ld d,d]] || [[Z80:Opcodes:ld|ld d,e]] || [[Z80:Opcodes:ld|ld d,h]] || [[Z80:Opcodes:ld|ld d,l]] || [[Z80:Opcodes:ld|ld d,(hl)]] || [[Z80:Opcodes:ld|ld d,a]] || [[Z80:Opcodes:ld|ld e,b]] || [[Z80:Opcodes:ld|ld e,c]] || [[Z80:Opcodes:ld|ld e,d]] || [[Z80:Opcodes:ld|ld e,e]] || [[Z80:Opcodes:ld|ld e,h]] || [[Z80:Opcodes:ld|ld e,l]] || [[Z80:Opcodes:ld|ld e,(hl)]] || [[Z80:Opcodes:ld|ld e,a]]  
+
| 5 || [[Z80:Opcodes:LD|ld d,b]] || [[Z80:Opcodes:LD|ld d,c]] || [[Z80:Opcodes:LD|ld d,d]] || [[Z80:Opcodes:LD|ld d,e]] || [[Z80:Opcodes:LD|ld d,h]] || [[Z80:Opcodes:LD|ld d,l]] || [[Z80:Opcodes:LD|ld d,(hl)]] || [[Z80:Opcodes:LD|ld d,a]] || [[Z80:Opcodes:LD|ld e,b]] || [[Z80:Opcodes:LD|ld e,c]] || [[Z80:Opcodes:LD|ld e,d]] || [[Z80:Opcodes:LD|ld e,e]] || [[Z80:Opcodes:LD|ld e,h]] || [[Z80:Opcodes:LD|ld e,l]] || [[Z80:Opcodes:LD|ld e,(hl)]] || [[Z80:Opcodes:LD|ld e,a]]  
 
|-
 
|-
! 6 || [[Z80:Opcodes:ld|ld h,b]] || [[Z80:Opcodes:ld|ld h,c]] || [[Z80:Opcodes:ld|ld h,d]] || [[Z80:Opcodes:ld|ld h,e]] || [[Z80:Opcodes:ld|ld h,h]] || [[Z80:Opcodes:ld|ld h,l]] || [[Z80:Opcodes:ld|ld h,(hl)]] || [[Z80:Opcodes:ld|ld h,a]] || [[Z80:Opcodes:ld|ld l,b]] || [[Z80:Opcodes:ld|ld l,c]] || [[Z80:Opcodes:ld|ld l,d]] || [[Z80:Opcodes:ld|ld l,e]] || [[Z80:Opcodes:ld|ld l,h]] || [[Z80:Opcodes:ld|ld l,l]] || [[Z80:Opcodes:ld|ld l,(hl)]] || [[Z80:Opcodes:ld|ld l,a]]  
+
| 6 || [[Z80:Opcodes:LD|ld h,b]] || [[Z80:Opcodes:LD|ld h,c]] || [[Z80:Opcodes:LD|ld h,d]] || [[Z80:Opcodes:LD|ld h,e]] || [[Z80:Opcodes:LD|ld h,h]] || [[Z80:Opcodes:LD|ld h,l]] || [[Z80:Opcodes:LD|ld h,(hl)]] || [[Z80:Opcodes:LD|ld h,a]] || [[Z80:Opcodes:LD|ld l,b]] || [[Z80:Opcodes:LD|ld l,c]] || [[Z80:Opcodes:LD|ld l,d]] || [[Z80:Opcodes:LD|ld l,e]] || [[Z80:Opcodes:LD|ld l,h]] || [[Z80:Opcodes:LD|ld l,l]] || [[Z80:Opcodes:LD|ld l,(hl)]] || [[Z80:Opcodes:LD|ld l,a]]  
 
|-
 
|-
! 7 || [[Z80:Opcodes:ld|ld (hl),b]] || [[Z80:Opcodes:ld|ld (hl),c]] || [[Z80:Opcodes:ld|ld (hl),d]] || [[Z80:Opcodes:ld|ld (hl),e]] || [[Z80:Opcodes:ld|ld (hl),h]] || [[Z80:Opcodes:ld|ld (hl),l]] || '''[[Z80:Opcodes:halt|halt]]''' || [[Z80:Opcodes:ld|ld (hl),a]] || [[Z80:Opcodes:ld|ld a,b]] || [[Z80:Opcodes:ld|ld a,c]] || [[Z80:Opcodes:ld|ld a,d]] || [[Z80:Opcodes:ld|ld a,e]] || [[Z80:Opcodes:ld|ld a,h]] || [[Z80:Opcodes:ld|ld a,l]] || [[Z80:Opcodes:ld|ld a,(hl)]] || [[Z80:Opcodes:ld|ld a,a]]  
+
| 7 || [[Z80:Opcodes:LD|ld (hl),b]] || [[Z80:Opcodes:LD|ld (hl),c]] || [[Z80:Opcodes:LD|ld (hl),d]] || [[Z80:Opcodes:LD|ld (hl),e]] || [[Z80:Opcodes:LD|ld (hl),h]] || [[Z80:Opcodes:LD|ld (hl),l]] || '''[[Z80:Opcodes:HALT|halt]]''' || [[Z80:Opcodes:LD|ld (hl),a]] || [[Z80:Opcodes:LD|ld a,b]] || [[Z80:Opcodes:LD|ld a,c]] || [[Z80:Opcodes:LD|ld a,d]] || [[Z80:Opcodes:LD|ld a,e]] || [[Z80:Opcodes:LD|ld a,h]] || [[Z80:Opcodes:LD|ld a,l]] || [[Z80:Opcodes:LD|ld a,(hl)]] || [[Z80:Opcodes:LD|ld a,a]]  
 
|-
 
|-
! 8 || [[Z80:Opcodes:add|add a,b]] || [[Z80:Opcodes:add|add a,c]] || [[Z80:Opcodes:add|add a,d]] || [[Z80:Opcodes:add|add a,e]] || [[Z80:Opcodes:add|add a,h]] || [[Z80:Opcodes:add|add a,l]] || [[Z80:Opcodes:add|add a,(hl)]] || [[Z80:Opcodes:add|add a,a]] || [[Z80:Opcodes:adc|adc a,b]] || [[Z80:Opcodes:adc|adc a,c]] || [[Z80:Opcodes:adc|adc a,d]] || [[Z80:Opcodes:adc|adc a,e]] || [[Z80:Opcodes:adc|adc a,h]] || [[Z80:Opcodes:adc|adc a,l]] || [[Z80:Opcodes:adc|adc a,(hl)]] || [[Z80:Opcodes:adc|adc a,a]]  
+
| 8 || [[Z80:Opcodes:ADD|add a,b]] || [[Z80:Opcodes:ADD|add a,c]] || [[Z80:Opcodes:ADD|add a,d]] || [[Z80:Opcodes:ADD|add a,e]] || [[Z80:Opcodes:ADD|add a,h]] || [[Z80:Opcodes:ADD|add a,l]] || [[Z80:Opcodes:ADD|add a,(hl)]] || [[Z80:Opcodes:ADD|add a,a]] || [[Z80:Opcodes:ADC|adc a,b]] || [[Z80:Opcodes:ADC|adc a,c]] || [[Z80:Opcodes:ADC|adc a,d]] || [[Z80:Opcodes:ADC|adc a,e]] || [[Z80:Opcodes:ADC|adc a,h]] || [[Z80:Opcodes:ADC|adc a,l]] || [[Z80:Opcodes:ADC|adc a,(hl)]] || [[Z80:Opcodes:ADC|adc a,a]]  
 
|-
 
|-
! 9 || [[Z80:Opcodes:sub|sub b]] || [[Z80:Opcodes:sub|sub c]] || [[Z80:Opcodes:sub|sub d]] || [[Z80:Opcodes:sub|sub e]] || [[Z80:Opcodes:sub|sub h]] || [[Z80:Opcodes:sub|sub l]] || [[Z80:Opcodes:sub|sub (hl)]] || [[Z80:Opcodes:sub|sub a]] || [[Z80:Opcodes:sbc|sbc a,b]] || [[Z80:Opcodes:sbc|sbc a,c]] || [[Z80:Opcodes:sbc|sbc a,d]] || [[Z80:Opcodes:sbc|sbc a,e]] || [[Z80:Opcodes:sbc|sbc a,h]] || [[Z80:Opcodes:sbc|sbc a,l]] || [[Z80:Opcodes:sbc|sbc a,(hl)]] || [[Z80:Opcodes:sbc|sbc a,a]]  
+
| 9 || [[Z80:Opcodes:SUB|sub b]] || [[Z80:Opcodes:SUB|sub c]] || [[Z80:Opcodes:SUB|sub d]] || [[Z80:Opcodes:SUB|sub e]] || [[Z80:Opcodes:SUB|sub h]] || [[Z80:Opcodes:SUB|sub l]] || [[Z80:Opcodes:SUB|sub (hl)]] || [[Z80:Opcodes:SUB|sub a]] || [[Z80:Opcodes:SBC|sbc a,b]] || [[Z80:Opcodes:SBC|sbc a,c]] || [[Z80:Opcodes:SBC|sbc a,d]] || [[Z80:Opcodes:SBC|sbc a,e]] || [[Z80:Opcodes:SBC|sbc a,h]] || [[Z80:Opcodes:SBC|sbc a,l]] || [[Z80:Opcodes:SBC|sbc a,(hl)]] || [[Z80:Opcodes:SBC|sbc a,a]]  
 
|-
 
|-
! A || [[Z80:Opcodes:and|and b]] || [[Z80:Opcodes:and|and c]] || [[Z80:Opcodes:and|and d]] || [[Z80:Opcodes:and|and e]] || [[Z80:Opcodes:and|and h]] || [[Z80:Opcodes:and|and l]] || [[Z80:Opcodes:and|and (hl)]] || [[Z80:Opcodes:and|and a]] || [[Z80:Opcodes:xor|xor b]] || [[Z80:Opcodes:xor|xor c]] || [[Z80:Opcodes:xor|xor d]] || [[Z80:Opcodes:xor|xor e]] || [[Z80:Opcodes:xor|xor h]] || [[Z80:Opcodes:xor|xor l]] || [[Z80:Opcodes:xor|xor (hl)]] || [[Z80:Opcodes:xor|xor a]]  
+
| A || [[Z80:Opcodes:AND|and b]] || [[Z80:Opcodes:AND|and c]] || [[Z80:Opcodes:AND|and d]] || [[Z80:Opcodes:AND|and e]] || [[Z80:Opcodes:AND|and h]] || [[Z80:Opcodes:AND|and l]] || [[Z80:Opcodes:AND|and (hl)]] || [[Z80:Opcodes:AND|and a]] || [[Z80:Opcodes:XOR|xor b]] || [[Z80:Opcodes:XOR|xor c]] || [[Z80:Opcodes:XOR|xor d]] || [[Z80:Opcodes:XOR|xor e]] || [[Z80:Opcodes:XOR|xor h]] || [[Z80:Opcodes:XOR|xor l]] || [[Z80:Opcodes:XOR|xor (hl)]] || [[Z80:Opcodes:XOR|xor a]]  
 
|-
 
|-
! B || [[Z80:Opcodes:or|or b]] || [[Z80:Opcodes:or|or c]] || [[Z80:Opcodes:or|or d]] || [[Z80:Opcodes:or|or e]] || [[Z80:Opcodes:or|or h]] || [[Z80:Opcodes:or|or l]] || [[Z80:Opcodes:or|or (hl)]] || [[Z80:Opcodes:or|or a]] || [[Z80:Opcodes:cp|cp b]] || [[Z80:Opcodes:cp|cp c]] || [[Z80:Opcodes:cp|cp d]] || [[Z80:Opcodes:cp|cp e]] || [[Z80:Opcodes:cp|cp h]] || [[Z80:Opcodes:cp|cp l]] || [[Z80:Opcodes:cp|cp (hl)]] || [[Z80:Opcodes:cp|cp a]]  
+
| B || [[Z80:Opcodes:OR|or b]] || [[Z80:Opcodes:OR|or c]] || [[Z80:Opcodes:OR|or d]] || [[Z80:Opcodes:OR|or e]] || [[Z80:Opcodes:OR|or h]] || [[Z80:Opcodes:OR|or l]] || [[Z80:Opcodes:OR|or (hl)]] || [[Z80:Opcodes:OR|or a]] || [[Z80:Opcodes:CP|cp b]] || [[Z80:Opcodes:CP|cp c]] || [[Z80:Opcodes:CP|cp d]] || [[Z80:Opcodes:CP|cp e]] || [[Z80:Opcodes:CP|cp h]] || [[Z80:Opcodes:CP|cp l]] || [[Z80:Opcodes:CP|cp (hl)]] || [[Z80:Opcodes:CP|cp a]]  
 
|-
 
|-
! C || [[Z80:Opcodes:ret|ret nz]] || [[Z80:Opcodes:pop|pop bc]] || [[Z80:Opcodes:jp|jp nz,xx]] || [[Z80:Opcodes:jp|jp xx]] || [[Z80:Opcodes:call|call nz,xx]] || [[Z80:Opcodes:push|push bc]] || [[Z80:Opcodes:add|add a,x]] || [[Z80:Opcodes:rst|rst 00h]] || [[Z80:Opcodes:ret|ret z]] || '''[[Z80:Opcodes:ret|ret]]''' || [[Z80:Opcodes:jp|jp z,xx]] || '''xxBITxx''' || [[Z80:Opcodes:call|call z,xx]] || [[Z80:Opcodes:call|call xx]] || [[Z80:Opcodes:adc|adc a,x]] || [[Z80:Opcodes:rst|rst 08h]]  
+
| C || [[Z80:Opcodes:RET|ret nz]] || [[Z80:Opcodes:POP|pop bc]] || [[Z80:Opcodes:JP|jp nz,xx]] || [[Z80:Opcodes:JP|jp xx]] || [[Z80:Opcodes:CALL|call nz,xx]] || [[Z80:Opcodes:PUSH|push bc]] || [[Z80:Opcodes:ADD|add a,x]] || [[Z80:Opcodes:RST|rst 00h]] || [[Z80:Opcodes:RET|ret z]] || '''[[Z80:Opcodes:RET|ret]]''' || [[Z80:Opcodes:JP|jp z,xx]] || '''xxBITxx''' || [[Z80:Opcodes:CALL|call z,xx]] || [[Z80:Opcodes:CALL|call xx]] || [[Z80:Opcodes:ADC|adc a,x]] || [[Z80:Opcodes:RST|rst 08h]]  
 
|-
 
|-
! D || [[Z80:Opcodes:ret|ret nc]] || [[Z80:Opcodes:pop|pop de]] || [[Z80:Opcodes:jp|jp nc,xx]] || [[Z80:Opcodes:out|out (x),a]] || [[Z80:Opcodes:call|call nc,xx]] || [[Z80:Opcodes:push|push de]] || [[Z80:Opcodes:sub|sub x]] || [[Z80:Opcodes:rst|rst 10h]] || [[Z80:Opcodes:ret|ret c]] || [[Z80:Opcodes:exx|exx]] || [[Z80:Opcodes:jp|jp c,xx]] || [[Z80:Opcodes:in|in a,(x)]] || [[Z80:Opcodes:call|call c,xx]] || '''xxIXxx''' || [[Z80:Opcodes:sbc|sbc a,x]] || [[Z80:Opcodes:rst|rst 18h]]  
+
| D || [[Z80:Opcodes:RET|ret nc]] || [[Z80:Opcodes:POP|pop de]] || [[Z80:Opcodes:JP|jp nc,xx]] || [[Z80:Opcodes:OUT|out (x),a]] || [[Z80:Opcodes:CALL|call nc,xx]] || [[Z80:Opcodes:PUSH|push de]] || [[Z80:Opcodes:SUB|sub x]] || [[Z80:Opcodes:RST|rst 10h]] || [[Z80:Opcodes:RET|ret c]] || [[Z80:Opcodes:EXX|exx]] || [[Z80:Opcodes:JP|jp c,xx]] || [[Z80:Opcodes:IN|in a,(x)]] || [[Z80:Opcodes:CALL|call c,xx]] || '''xxIXxx''' || [[Z80:Opcodes:SBC|sbc a,x]] || [[Z80:Opcodes:RST|rst 18h]]  
 
|-
 
|-
! E || [[Z80:Opcodes:ret|ret po]] || [[Z80:Opcodes:pop|pop hl]] || [[Z80:Opcodes:jp|jp po,xx]] || [[Z80:Opcodes:ex|ex (sp),hl]] || [[Z80:Opcodes:call|call po,xx]] || [[Z80:Opcodes:push|push hl]] || [[Z80:Opcodes:and|and x]] || [[Z80:Opcodes:rst|rst 20h]] || [[Z80:Opcodes:ret|ret pe]] || [[Z80:Opcodes:jp|jp (hl)]] || [[Z80:Opcodes:jp|jp pe,xx]] || [[Z80:Opcodes:ex|ex de,hl]] || [[Z80:Opcodes:call|call pe,xx]] || '''xx80xx''' || [[Z80:Opcodes:xor|xor x]] || [[Z80:Opcodes:rst|rst 28h]]  
+
| E || [[Z80:Opcodes:RET|ret po]] || [[Z80:Opcodes:POP|pop hl]] || [[Z80:Opcodes:JP|jp po,xx]] || [[Z80:Opcodes:EX|ex (sp),hl]] || [[Z80:Opcodes:CALL|call po,xx]] || [[Z80:Opcodes:PUSH|push hl]] || [[Z80:Opcodes:AND|and x]] || [[Z80:Opcodes:RST|rst 20h]] || [[Z80:Opcodes:RET|ret pe]] || [[Z80:Opcodes:JP|jp (hl)]] || [[Z80:Opcodes:JP|jp pe,xx]] || [[Z80:Opcodes:EX|ex de,hl]] || [[Z80:Opcodes:CALL|call pe,xx]] || '''xx80xx''' || [[Z80:Opcodes:XOR|xor x]] || [[Z80:Opcodes:RST|rst 28h]]  
 
|-
 
|-
! F || [[Z80:Opcodes:ret|ret p]] || [[Z80:Opcodes:pop|pop af]] || [[Z80:Opcodes:jp|jp p,xx]] || [[Z80:Opcodes:di|di]] || [[Z80:Opcodes:call|call p,xx]] || [[Z80:Opcodes:push|push af]] || [[Z80:Opcodes:or|or x]] || [[Z80:Opcodes:rst|rst 30h]] || [[Z80:Opcodes:ret|ret m]] || [[Z80:Opcodes:ld|ld sp,hl]] || [[Z80:Opcodes:jp|jp m,xx]] || [[Z80:Opcodes:ei|ei]] || [[Z80:Opcodes:call|call m,xx]] || '''xxIYxx''' || [[Z80:Opcodes:cp|cp x]] || [[Z80:Opcodes:rst|rst 38h]]  
+
| F || [[Z80:Opcodes:RET|ret p]] || [[Z80:Opcodes:POP|pop af]] || [[Z80:Opcodes:JP|jp p,xx]] || [[Z80:Opcodes:DI|di]] || [[Z80:Opcodes:CALL|call p,xx]] || [[Z80:Opcodes:PUSH|push af]] || [[Z80:Opcodes:OR|or x]] || [[Z80:Opcodes:RST|rst 30h]] || [[Z80:Opcodes:RET|ret m]] || [[Z80:Opcodes:LD|ld sp,hl]] || [[Z80:Opcodes:JP|jp m,xx]] || [[Z80:Opcodes:EI|ei]] || [[Z80:Opcodes:CALL|call m,xx]] || '''xxIYxx''' || [[Z80:Opcodes:CP|cp x]] || [[Z80:Opcodes:RST|rst 38h]]  
 
|}
 
|}
  
Line 46: Line 46:
 
! !! 0 !! 1 !! 2 !! 3 !! 4 !! 5 !! 6 !! 7 !! 8 !! 9 !! A !! B !! C !! D !! E !! F  
 
! !! 0 !! 1 !! 2 !! 3 !! 4 !! 5 !! 6 !! 7 !! 8 !! 9 !! A !! B !! C !! D !! E !! F  
 
|-
 
|-
! 4 || [[Z80:Opcodes:in|in b,(c)]] || [[Z80:Opcodes:out|out (c),b]] || [[Z80:Opcodes:sbc|sbc hl,bc]] || [[Z80:Opcodes:ld|ld (xx),bc]] || [[Z80:Opcodes:neg|neg]] || [[Z80:Opcodes:retn|retn]] || [[Z80:Opcodes:im|im 0]] || [[Z80:Opcodes:ld|ld i,a]] || [[Z80:Opcodes:in|in c,(c)]] || [[Z80:Opcodes:out|out (c),c]] || [[Z80:Opcodes:adc|adc hl,bc]] || [[Z80:Opcodes:ld|ld bc,(xx)]] || [[Z80:Opcodes:neg|neg]] || [[Z80:Opcodes:reti|reti]] ||  || [[Z80:Opcodes:ld|ld r,a]]  
+
| 4 || [[Z80:Opcodes:IN|in b,(c)]] || [[Z80:Opcodes:OUT|out (c),b]] || [[Z80:Opcodes:SBC|sbc hl,bc]] || [[Z80:Opcodes:LD|ld (xx),bc]] || [[Z80:Opcodes:NEG|neg]] || [[Z80:Opcodes:RETN|retn]] || [[Z80:Opcodes:IM|im 0]] || [[Z80:Opcodes:LD|ld i,a]] || [[Z80:Opcodes:IN|in c,(c)]] || [[Z80:Opcodes:OUT|out (c),c]] || [[Z80:Opcodes:ADC|adc hl,bc]] || [[Z80:Opcodes:LD|ld bc,(xx)]] || [[Z80:Opcodes:NEG|neg]] || [[Z80:Opcodes:RETI|reti]] ||  || [[Z80:Opcodes:LD|ld r,a]]  
 
|-
 
|-
! 5 || [[Z80:Opcodes:in|in d,(c)]] || [[Z80:Opcodes:out|out (c),d]] || [[Z80:Opcodes:sbc|sbc hl,de]] || [[Z80:Opcodes:ld|ld (xx),de]] || [[Z80:Opcodes:neg|neg]] || [[Z80:Opcodes:retn|retn]] || [[Z80:Opcodes:im|im 1]] || [[Z80:Opcodes:ld|ld a,i]] || [[Z80:Opcodes:in|in e,(c)]] || [[Z80:Opcodes:out|out (c),e]] || [[Z80:Opcodes:adc|adc hl,de]] || [[Z80:Opcodes:ld|ld de,(xx)]] || [[Z80:Opcodes:neg|neg]] || [[Z80:Opcodes:retn|retn]] || [[Z80:Opcodes:im|im 2]] || [[Z80:Opcodes:ld|ld a,r]]  
+
| 5 || [[Z80:Opcodes:IN|in d,(c)]] || [[Z80:Opcodes:OUT|out (c),d]] || [[Z80:Opcodes:SBC|sbc hl,de]] || [[Z80:Opcodes:LD|ld (xx),de]] || [[Z80:Opcodes:NEG|neg]] || [[Z80:Opcodes:RETN|retn]] || [[Z80:Opcodes:IM|im 1]] || [[Z80:Opcodes:LD|ld a,i]] || [[Z80:Opcodes:IN|in e,(c)]] || [[Z80:Opcodes:OUT|out (c),e]] || [[Z80:Opcodes:ADC|adc hl,de]] || [[Z80:Opcodes:LD|ld de,(xx)]] || [[Z80:Opcodes:NEG|neg]] || [[Z80:Opcodes:RETN|retn]] || [[Z80:Opcodes:IM|im 2]] || [[Z80:Opcodes:LD|ld a,r]]  
 
|-
 
|-
! 6 || [[Z80:Opcodes:in|in h,(c)]] || [[Z80:Opcodes:out|out (c),h]] || [[Z80:Opcodes:sbc|sbc hl,hl]] || [[Z80:Opcodes:ld|ld (xx),hl]] || [[Z80:Opcodes:neg|neg]] || [[Z80:Opcodes:retn|retn]] ||  || [[Z80:Opcodes:rrd|rrd]] || [[Z80:Opcodes:in|in l,(c)]] || [[Z80:Opcodes:out|out (c),l]] || [[Z80:Opcodes:adc|adc hl,hl]] || [[Z80:Opcodes:ld|ld hl,(xx)]] || [[Z80:Opcodes:neg|neg]] || [[Z80:Opcodes:retn|retn]] ||  || [[Z80:Opcodes:rld|rld]]  
+
| 6 || [[Z80:Opcodes:IN|in h,(c)]] || [[Z80:Opcodes:OUT|out (c),h]] || [[Z80:Opcodes:SBC|sbc hl,hl]] || [[Z80:Opcodes:LD|ld (xx),hl]] || [[Z80:Opcodes:NEG|neg]] || [[Z80:Opcodes:RETN|retn]] ||  || [[Z80:Opcodes:RRD|rrd]] || [[Z80:Opcodes:IN|in l,(c)]] || [[Z80:Opcodes:OUT|out (c),l]] || [[Z80:Opcodes:ADC|adc hl,hl]] || [[Z80:Opcodes:LD|ld hl,(xx)]] || [[Z80:Opcodes:NEG|neg]] || [[Z80:Opcodes:RETN|retn]] ||  || [[Z80:Opcodes:RLD|rld]]  
 
|-
 
|-
! 7 || [[Z80:Opcodes:in|in f,(c)]] || [[Z80:Opcodes:out|out (c),f]] || [[Z80:Opcodes:sbc|sbc hl,sp]] || [[Z80:Opcodes:ld|ld (xx),sp]] || [[Z80:Opcodes:neg|neg]] || [[Z80:Opcodes:retn|retn]] ||  ||  || [[Z80:Opcodes:in|in a,(c)]] || [[Z80:Opcodes:out|out (c),a]] || [[Z80:Opcodes:adc|adc hl,sp]] || [[Z80:Opcodes:ld|ld sp,(xx)]] || [[Z80:Opcodes:neg|neg]] || [[Z80:Opcodes:reti|reti]] ||  ||  
+
| 7 || [[Z80:Opcodes:IN|in f,(c)]] || [[Z80:Opcodes:OUT|out (c),f]] || [[Z80:Opcodes:SBC|sbc hl,sp]] || [[Z80:Opcodes:LD|ld (xx),sp]] || [[Z80:Opcodes:NEG|neg]] || [[Z80:Opcodes:RETN|retn]] ||  ||  || [[Z80:Opcodes:IN|in a,(c)]] || [[Z80:Opcodes:OUT|out (c),a]] || [[Z80:Opcodes:ADC|adc hl,sp]] || [[Z80:Opcodes:LD|ld sp,(xx)]] || [[Z80:Opcodes:NEG|neg]] || [[Z80:Opcodes:RETI|reti]] ||  ||  
 
|-
 
|-
! A || [[Z80:Opcodes:ldi|ldi]] || [[Z80:Opcodes:cpi|cpi]] || [[Z80:Opcodes:ini|ini]] || [[Z80:Opcodes:outi|outi]] ||  ||  ||  ||  || [[Z80:Opcodes:ldd|ldd]] || [[Z80:Opcodes:cpd|cpd]] || [[Z80:Opcodes:ind|ind]] || [[Z80:Opcodes:outd|outd]] ||  ||  ||  ||  
+
| A || [[Z80:Opcodes:LDI|ldi]] || [[Z80:Opcodes:CPI|cpi]] || [[Z80:Opcodes:INI|ini]] || [[Z80:Opcodes:OUTI|outi]] ||  ||  ||  ||  || [[Z80:Opcodes:LDD|ldd]] || [[Z80:Opcodes:CPD|cpd]] || [[Z80:Opcodes:IND|ind]] || [[Z80:Opcodes:OUTD|outd]] ||  ||  ||  ||  
 
|-
 
|-
! B || [[Z80:Opcodes:ldir|ldir]] || [[Z80:Opcodes:cpir|cpir]] || [[Z80:Opcodes:inir|inir]] || [[Z80:Opcodes:otir|otir]] ||  ||  ||  ||  || [[Z80:Opcodes:lddr|lddr]] || [[Z80:Opcodes:cpdr|cpdr]] || [[Z80:Opcodes:indr|indr]] || [[Z80:Opcodes:otdr|otdr]] ||  ||  ||  ||  
+
| B || [[Z80:Opcodes:LDIR|ldir]] || [[Z80:Opcodes:CPIR|cpir]] || [[Z80:Opcodes:INIR|inir]] || [[Z80:Opcodes:OTIR|otir]] ||  ||  ||  ||  || [[Z80:Opcodes:LDDR|lddr]] || [[Z80:Opcodes:CPDR|cpdr]] || [[Z80:Opcodes:INDR|indr]] || [[Z80:Opcodes:OTDR|otdr]] ||  ||  ||  ||  
 
|}
 
|}
  
Line 65: Line 65:
 
! !! 0 !! 1 !! 2 !! 3 !! 4 !! 5 !! 6 !! 7 !! 8 !! 9 !! A !! B !! C !! D !! E !! F  
 
! !! 0 !! 1 !! 2 !! 3 !! 4 !! 5 !! 6 !! 7 !! 8 !! 9 !! A !! B !! C !! D !! E !! F  
 
|-
 
|-
! 0 || [[Z80:Opcodes:rlc|rlc b]] || [[Z80:Opcodes:rlc|rlc c]] || [[Z80:Opcodes:rlc|rlc d]] || [[Z80:Opcodes:rlc|rlc e]] || [[Z80:Opcodes:rlc|rlc h]] || [[Z80:Opcodes:rlc|rlc l]] || [[Z80:Opcodes:rlc|rlc (hl)]] || [[Z80:Opcodes:rlc|rlc a]] || [[Z80:Opcodes:rrc|rrc b]] || [[Z80:Opcodes:rrc|rrc c]] || [[Z80:Opcodes:rrc|rrc d]] || [[Z80:Opcodes:rrc|rrc e]] || [[Z80:Opcodes:rrc|rrc h]] || [[Z80:Opcodes:rrc|rrc l]] || [[Z80:Opcodes:rrc|rrc (hl)]] || [[Z80:Opcodes:rrc|rrc a]]  
+
| 0 || [[Z80:Opcodes:RLC|rlc b]] || [[Z80:Opcodes:RLC|rlc c]] || [[Z80:Opcodes:RLC|rlc d]] || [[Z80:Opcodes:RLC|rlc e]] || [[Z80:Opcodes:RLC|rlc h]] || [[Z80:Opcodes:RLC|rlc l]] || [[Z80:Opcodes:RLC|rlc (hl)]] || [[Z80:Opcodes:RLC|rlc a]] || [[Z80:Opcodes:RRC|rrc b]] || [[Z80:Opcodes:RRC|rrc c]] || [[Z80:Opcodes:RRC|rrc d]] || [[Z80:Opcodes:RRC|rrc e]] || [[Z80:Opcodes:RRC|rrc h]] || [[Z80:Opcodes:RRC|rrc l]] || [[Z80:Opcodes:RRC|rrc (hl)]] || [[Z80:Opcodes:RRC|rrc a]]  
 
|-
 
|-
! 1 || [[Z80:Opcodes:rl|rl b]] || [[Z80:Opcodes:rl|rl c]] || [[Z80:Opcodes:rl|rl d]] || [[Z80:Opcodes:rl|rl e]] || [[Z80:Opcodes:rl|rl h]] || [[Z80:Opcodes:rl|rl l]] || [[Z80:Opcodes:rl|rl (hl)]] || [[Z80:Opcodes:rl|rl a]] || [[Z80:Opcodes:rr|rr b]] || [[Z80:Opcodes:rr|rr c]] || [[Z80:Opcodes:rr|rr d]] || [[Z80:Opcodes:rr|rr e]] || [[Z80:Opcodes:rr|rr h]] || [[Z80:Opcodes:rr|rr l]] || [[Z80:Opcodes:rr|rr (hl)]] || [[Z80:Opcodes:rr|rr a]]  
+
| 1 || [[Z80:Opcodes:RL|rl b]] || [[Z80:Opcodes:RL|rl c]] || [[Z80:Opcodes:RL|rl d]] || [[Z80:Opcodes:RL|rl e]] || [[Z80:Opcodes:RL|rl h]] || [[Z80:Opcodes:RL|rl l]] || [[Z80:Opcodes:RL|rl (hl)]] || [[Z80:Opcodes:RL|rl a]] || [[Z80:Opcodes:RR|rr b]] || [[Z80:Opcodes:RR|rr c]] || [[Z80:Opcodes:RR|rr d]] || [[Z80:Opcodes:RR|rr e]] || [[Z80:Opcodes:RR|rr h]] || [[Z80:Opcodes:RR|rr l]] || [[Z80:Opcodes:RR|rr (hl)]] || [[Z80:Opcodes:RR|rr a]]  
 
|-
 
|-
! 2 || [[Z80:Opcodes:sla|sla b]] || [[Z80:Opcodes:sla|sla c]] || [[Z80:Opcodes:sla|sla d]] || [[Z80:Opcodes:sla|sla e]] || [[Z80:Opcodes:sla|sla h]] || [[Z80:Opcodes:sla|sla l]] || [[Z80:Opcodes:sla|sla (hl)]] || [[Z80:Opcodes:sla|sla a]] || [[Z80:Opcodes:sra|sra b]] || [[Z80:Opcodes:sra|sra c]] || [[Z80:Opcodes:sra|sra d]] || [[Z80:Opcodes:sra|sra e]] || [[Z80:Opcodes:sra|sra h]] || [[Z80:Opcodes:sra|sra l]] || [[Z80:Opcodes:sra|sra (hl)]] || [[Z80:Opcodes:sra|sra a]]  
+
| 2 || [[Z80:Opcodes:SLA|sla b]] || [[Z80:Opcodes:SLA|sla c]] || [[Z80:Opcodes:SLA|sla d]] || [[Z80:Opcodes:SLA|sla e]] || [[Z80:Opcodes:SLA|sla h]] || [[Z80:Opcodes:SLA|sla l]] || [[Z80:Opcodes:SLA|sla (hl)]] || [[Z80:Opcodes:SLA|sla a]] || [[Z80:Opcodes:SRA|sra b]] || [[Z80:Opcodes:SRA|sra c]] || [[Z80:Opcodes:SRA|sra d]] || [[Z80:Opcodes:SRA|sra e]] || [[Z80:Opcodes:SRA|sra h]] || [[Z80:Opcodes:SRA|sra l]] || [[Z80:Opcodes:SRA|sra (hl)]] || [[Z80:Opcodes:SRA|sra a]]  
 
|-
 
|-
! 3 || [[Z80:Opcodes:sll|sll b]] || [[Z80:Opcodes:sll|sll c]] || [[Z80:Opcodes:sll|sll d]] || [[Z80:Opcodes:sll|sll e]] || [[Z80:Opcodes:sll|sll h]] || [[Z80:Opcodes:sll|sll l]] || [[Z80:Opcodes:sll|sll (hl)]] || [[Z80:Opcodes:sll|sll a]] || [[Z80:Opcodes:srl|srl b]] || [[Z80:Opcodes:srl|srl c]] || [[Z80:Opcodes:srl|srl d]] || [[Z80:Opcodes:srl|srl e]] || [[Z80:Opcodes:srl|srl h]] || [[Z80:Opcodes:srl|srl l]] || [[Z80:Opcodes:srl|srl (hl)]] || [[Z80:Opcodes:srl|srl a]]  
+
| 3 || [[Z80:Opcodes:SLL|sll b]] || [[Z80:Opcodes:SLL|sll c]] || [[Z80:Opcodes:SLL|sll d]] || [[Z80:Opcodes:SLL|sll e]] || [[Z80:Opcodes:SLL|sll h]] || [[Z80:Opcodes:SLL|sll l]] || [[Z80:Opcodes:SLL|sll (hl)]] || [[Z80:Opcodes:SLL|sll a]] || [[Z80:Opcodes:SRL|srl b]] || [[Z80:Opcodes:SRL|srl c]] || [[Z80:Opcodes:SRL|srl d]] || [[Z80:Opcodes:SRL|srl e]] || [[Z80:Opcodes:SRL|srl h]] || [[Z80:Opcodes:SRL|srl l]] || [[Z80:Opcodes:SRL|srl (hl)]] || [[Z80:Opcodes:SRL|srl a]]  
 
|-
 
|-
! 4 || [[Z80:Opcodes:bit|bit 0,b]] || [[Z80:Opcodes:bit|bit 0,c]] || [[Z80:Opcodes:bit|bit 0,d]] || [[Z80:Opcodes:bit|bit 0,e]] || [[Z80:Opcodes:bit|bit 0,h]] || [[Z80:Opcodes:bit|bit 0,l]] || [[Z80:Opcodes:bit|bit 0,(hl)]] || [[Z80:Opcodes:bit|bit 0,a]] || [[Z80:Opcodes:bit|bit 1,b]] || [[Z80:Opcodes:bit|bit 1,c]] || [[Z80:Opcodes:bit|bit 1,d]] || [[Z80:Opcodes:bit|bit 1,e]] || [[Z80:Opcodes:bit|bit 1,h]] || [[Z80:Opcodes:bit|bit 1,l]] || [[Z80:Opcodes:bit|bit 1,(hl)]] || [[Z80:Opcodes:bit|bit 1,a]]  
+
| 4 || [[Z80:Opcodes:BIT|bit 0,b]] || [[Z80:Opcodes:BIT|bit 0,c]] || [[Z80:Opcodes:BIT|bit 0,d]] || [[Z80:Opcodes:BIT|bit 0,e]] || [[Z80:Opcodes:BIT|bit 0,h]] || [[Z80:Opcodes:BIT|bit 0,l]] || [[Z80:Opcodes:BIT|bit 0,(hl)]] || [[Z80:Opcodes:BIT|bit 0,a]] || [[Z80:Opcodes:BIT|bit 1,b]] || [[Z80:Opcodes:BIT|bit 1,c]] || [[Z80:Opcodes:BIT|bit 1,d]] || [[Z80:Opcodes:BIT|bit 1,e]] || [[Z80:Opcodes:BIT|bit 1,h]] || [[Z80:Opcodes:BIT|bit 1,l]] || [[Z80:Opcodes:BIT|bit 1,(hl)]] || [[Z80:Opcodes:BIT|bit 1,a]]  
 
|-
 
|-
! 5 || [[Z80:Opcodes:bit|bit 2,b]] || [[Z80:Opcodes:bit|bit 2,c]] || [[Z80:Opcodes:bit|bit 2,d]] || [[Z80:Opcodes:bit|bit 2,e]] || [[Z80:Opcodes:bit|bit 2,h]] || [[Z80:Opcodes:bit|bit 2,l]] || [[Z80:Opcodes:bit|bit 2,(hl)]] || [[Z80:Opcodes:bit|bit 2,a]] || [[Z80:Opcodes:bit|bit 3,b]] || [[Z80:Opcodes:bit|bit 3,c]] || [[Z80:Opcodes:bit|bit 3,d]] || [[Z80:Opcodes:bit|bit 3,e]] || [[Z80:Opcodes:bit|bit 3,h]] || [[Z80:Opcodes:bit|bit 3,l]] || [[Z80:Opcodes:bit|bit 3,(hl)]] || [[Z80:Opcodes:bit|bit 3,a]]  
+
| 5 || [[Z80:Opcodes:BIT|bit 2,b]] || [[Z80:Opcodes:BIT|bit 2,c]] || [[Z80:Opcodes:BIT|bit 2,d]] || [[Z80:Opcodes:BIT|bit 2,e]] || [[Z80:Opcodes:BIT|bit 2,h]] || [[Z80:Opcodes:BIT|bit 2,l]] || [[Z80:Opcodes:BIT|bit 2,(hl)]] || [[Z80:Opcodes:BIT|bit 2,a]] || [[Z80:Opcodes:BIT|bit 3,b]] || [[Z80:Opcodes:BIT|bit 3,c]] || [[Z80:Opcodes:BIT|bit 3,d]] || [[Z80:Opcodes:BIT|bit 3,e]] || [[Z80:Opcodes:BIT|bit 3,h]] || [[Z80:Opcodes:BIT|bit 3,l]] || [[Z80:Opcodes:BIT|bit 3,(hl)]] || [[Z80:Opcodes:BIT|bit 3,a]]  
 
|-
 
|-
! 6 || [[Z80:Opcodes:bit|bit 4,b]] || [[Z80:Opcodes:bit|bit 4,c]] || [[Z80:Opcodes:bit|bit 4,d]] || [[Z80:Opcodes:bit|bit 4,e]] || [[Z80:Opcodes:bit|bit 4,h]] || [[Z80:Opcodes:bit|bit 4,l]] || [[Z80:Opcodes:bit|bit 4,(hl)]] || [[Z80:Opcodes:bit|bit 4,a]] || [[Z80:Opcodes:bit|bit 5,b]] || [[Z80:Opcodes:bit|bit 5,c]] || [[Z80:Opcodes:bit|bit 5,d]] || [[Z80:Opcodes:bit|bit 5,e]] || [[Z80:Opcodes:bit|bit 5,h]] || [[Z80:Opcodes:bit|bit 5,l]] || [[Z80:Opcodes:bit|bit 5,(hl)]] || [[Z80:Opcodes:bit|bit 5,a]]  
+
| 6 || [[Z80:Opcodes:BIT|bit 4,b]] || [[Z80:Opcodes:BIT|bit 4,c]] || [[Z80:Opcodes:BIT|bit 4,d]] || [[Z80:Opcodes:BIT|bit 4,e]] || [[Z80:Opcodes:BIT|bit 4,h]] || [[Z80:Opcodes:BIT|bit 4,l]] || [[Z80:Opcodes:BIT|bit 4,(hl)]] || [[Z80:Opcodes:BIT|bit 4,a]] || [[Z80:Opcodes:BIT|bit 5,b]] || [[Z80:Opcodes:BIT|bit 5,c]] || [[Z80:Opcodes:BIT|bit 5,d]] || [[Z80:Opcodes:BIT|bit 5,e]] || [[Z80:Opcodes:BIT|bit 5,h]] || [[Z80:Opcodes:BIT|bit 5,l]] || [[Z80:Opcodes:BIT|bit 5,(hl)]] || [[Z80:Opcodes:BIT|bit 5,a]]  
 
|-
 
|-
! 7 || [[Z80:Opcodes:bit|bit 6,b]] || [[Z80:Opcodes:bit|bit 6,c]] || [[Z80:Opcodes:bit|bit 6,d]] || [[Z80:Opcodes:bit|bit 6,e]] || [[Z80:Opcodes:bit|bit 6,h]] || [[Z80:Opcodes:bit|bit 6,l]] || [[Z80:Opcodes:bit|bit 6,(hl)]] || [[Z80:Opcodes:bit|bit 6,a]] || [[Z80:Opcodes:bit|bit 7,b]] || [[Z80:Opcodes:bit|bit 7,c]] || [[Z80:Opcodes:bit|bit 7,d]] || [[Z80:Opcodes:bit|bit 7,e]] || [[Z80:Opcodes:bit|bit 7,h]] || [[Z80:Opcodes:bit|bit 7,l]] || [[Z80:Opcodes:bit|bit 7,(hl)]] || [[Z80:Opcodes:bit|bit 7,a]]  
+
| 7 || [[Z80:Opcodes:BIT|bit 6,b]] || [[Z80:Opcodes:BIT|bit 6,c]] || [[Z80:Opcodes:BIT|bit 6,d]] || [[Z80:Opcodes:BIT|bit 6,e]] || [[Z80:Opcodes:BIT|bit 6,h]] || [[Z80:Opcodes:BIT|bit 6,l]] || [[Z80:Opcodes:BIT|bit 6,(hl)]] || [[Z80:Opcodes:BIT|bit 6,a]] || [[Z80:Opcodes:BIT|bit 7,b]] || [[Z80:Opcodes:BIT|bit 7,c]] || [[Z80:Opcodes:BIT|bit 7,d]] || [[Z80:Opcodes:BIT|bit 7,e]] || [[Z80:Opcodes:BIT|bit 7,h]] || [[Z80:Opcodes:BIT|bit 7,l]] || [[Z80:Opcodes:BIT|bit 7,(hl)]] || [[Z80:Opcodes:BIT|bit 7,a]]  
 
|-
 
|-
! 8 || [[Z80:Opcodes:res|res 0,b]] || [[Z80:Opcodes:res|res 0,c]] || [[Z80:Opcodes:res|res 0,d]] || [[Z80:Opcodes:res|res 0,e]] || [[Z80:Opcodes:res|res 0,h]] || [[Z80:Opcodes:res|res 0,l]] || [[Z80:Opcodes:res|res 0,(hl)]] || [[Z80:Opcodes:res|res 0,a]] || [[Z80:Opcodes:res|res 1,b]] || [[Z80:Opcodes:res|res 1,c]] || [[Z80:Opcodes:res|res 1,d]] || [[Z80:Opcodes:res|res 1,e]] || [[Z80:Opcodes:res|res 1,h]] || [[Z80:Opcodes:res|res 1,l]] || [[Z80:Opcodes:res|res 1,(hl)]] || [[Z80:Opcodes:res|res 1,a]]  
+
| 8 || [[Z80:Opcodes:RES|res 0,b]] || [[Z80:Opcodes:RES|res 0,c]] || [[Z80:Opcodes:RES|res 0,d]] || [[Z80:Opcodes:RES|res 0,e]] || [[Z80:Opcodes:RES|res 0,h]] || [[Z80:Opcodes:RES|res 0,l]] || [[Z80:Opcodes:RES|res 0,(hl)]] || [[Z80:Opcodes:RES|res 0,a]] || [[Z80:Opcodes:RES|res 1,b]] || [[Z80:Opcodes:RES|res 1,c]] || [[Z80:Opcodes:RES|res 1,d]] || [[Z80:Opcodes:RES|res 1,e]] || [[Z80:Opcodes:RES|res 1,h]] || [[Z80:Opcodes:RES|res 1,l]] || [[Z80:Opcodes:RES|res 1,(hl)]] || [[Z80:Opcodes:RES|res 1,a]]  
 
|-
 
|-
! 9 || [[Z80:Opcodes:res|res 2,b]] || [[Z80:Opcodes:res|res 2,c]] || [[Z80:Opcodes:res|res 2,d]] || [[Z80:Opcodes:res|res 2,e]] || [[Z80:Opcodes:res|res 2,h]] || [[Z80:Opcodes:res|res 2,l]] || [[Z80:Opcodes:res|res 2,(hl)]] || [[Z80:Opcodes:res|res 2,a]] || [[Z80:Opcodes:res|res 3,b]] || [[Z80:Opcodes:res|res 3,c]] || [[Z80:Opcodes:res|res 3,d]] || [[Z80:Opcodes:res|res 3,e]] || [[Z80:Opcodes:res|res 3,h]] || [[Z80:Opcodes:res|res 3,l]] || [[Z80:Opcodes:res|res 3,(hl)]] || [[Z80:Opcodes:res|res 3,a]]  
+
| 9 || [[Z80:Opcodes:RES|res 2,b]] || [[Z80:Opcodes:RES|res 2,c]] || [[Z80:Opcodes:RES|res 2,d]] || [[Z80:Opcodes:RES|res 2,e]] || [[Z80:Opcodes:RES|res 2,h]] || [[Z80:Opcodes:RES|res 2,l]] || [[Z80:Opcodes:RES|res 2,(hl)]] || [[Z80:Opcodes:RES|res 2,a]] || [[Z80:Opcodes:RES|res 3,b]] || [[Z80:Opcodes:RES|res 3,c]] || [[Z80:Opcodes:RES|res 3,d]] || [[Z80:Opcodes:RES|res 3,e]] || [[Z80:Opcodes:RES|res 3,h]] || [[Z80:Opcodes:RES|res 3,l]] || [[Z80:Opcodes:RES|res 3,(hl)]] || [[Z80:Opcodes:RES|res 3,a]]  
 
|-
 
|-
! A || [[Z80:Opcodes:res|res 4,b]] || [[Z80:Opcodes:res|res 4,c]] || [[Z80:Opcodes:res|res 4,d]] || [[Z80:Opcodes:res|res 4,e]] || [[Z80:Opcodes:res|res 4,h]] || [[Z80:Opcodes:res|res 4,l]] || [[Z80:Opcodes:res|res 4,(hl)]] || [[Z80:Opcodes:res|res 4,a]] || [[Z80:Opcodes:res|res 5,b]] || [[Z80:Opcodes:res|res 5,c]] || [[Z80:Opcodes:res|res 5,d]] || [[Z80:Opcodes:res|res 5,e]] || [[Z80:Opcodes:res|res 5,h]] || [[Z80:Opcodes:res|res 5,l]] || [[Z80:Opcodes:res|res 5,(hl)]] || [[Z80:Opcodes:res|res 5,a]]  
+
| A || [[Z80:Opcodes:RES|res 4,b]] || [[Z80:Opcodes:RES|res 4,c]] || [[Z80:Opcodes:RES|res 4,d]] || [[Z80:Opcodes:RES|res 4,e]] || [[Z80:Opcodes:RES|res 4,h]] || [[Z80:Opcodes:RES|res 4,l]] || [[Z80:Opcodes:RES|res 4,(hl)]] || [[Z80:Opcodes:RES|res 4,a]] || [[Z80:Opcodes:RES|res 5,b]] || [[Z80:Opcodes:RES|res 5,c]] || [[Z80:Opcodes:RES|res 5,d]] || [[Z80:Opcodes:RES|res 5,e]] || [[Z80:Opcodes:RES|res 5,h]] || [[Z80:Opcodes:RES|res 5,l]] || [[Z80:Opcodes:RES|res 5,(hl)]] || [[Z80:Opcodes:RES|res 5,a]]  
 
|-
 
|-
! B || [[Z80:Opcodes:res|res 6,b]] || [[Z80:Opcodes:res|res 6,c]] || [[Z80:Opcodes:res|res 6,d]] || [[Z80:Opcodes:res|res 6,e]] || [[Z80:Opcodes:res|res 6,h]] || [[Z80:Opcodes:res|res 6,l]] || [[Z80:Opcodes:res|res 6,(hl)]] || [[Z80:Opcodes:res|res 6,a]] || [[Z80:Opcodes:res|res 7,b]] || [[Z80:Opcodes:res|res 7,c]] || [[Z80:Opcodes:res|res 7,d]] || [[Z80:Opcodes:res|res 7,e]] || [[Z80:Opcodes:res|res 7,h]] || [[Z80:Opcodes:res|res 7,l]] || [[Z80:Opcodes:res|res 7,(hl)]] || [[Z80:Opcodes:res|res 7,a]]  
+
| B || [[Z80:Opcodes:RES|res 6,b]] || [[Z80:Opcodes:RES|res 6,c]] || [[Z80:Opcodes:RES|res 6,d]] || [[Z80:Opcodes:RES|res 6,e]] || [[Z80:Opcodes:RES|res 6,h]] || [[Z80:Opcodes:RES|res 6,l]] || [[Z80:Opcodes:RES|res 6,(hl)]] || [[Z80:Opcodes:RES|res 6,a]] || [[Z80:Opcodes:RES|res 7,b]] || [[Z80:Opcodes:RES|res 7,c]] || [[Z80:Opcodes:RES|res 7,d]] || [[Z80:Opcodes:RES|res 7,e]] || [[Z80:Opcodes:RES|res 7,h]] || [[Z80:Opcodes:RES|res 7,l]] || [[Z80:Opcodes:RES|res 7,(hl)]] || [[Z80:Opcodes:RES|res 7,a]]  
 
|-
 
|-
! C || [[Z80:Opcodes:set|set 0,b]] || [[Z80:Opcodes:set|set 0,c]] || [[Z80:Opcodes:set|set 0,d]] || [[Z80:Opcodes:set|set 0,e]] || [[Z80:Opcodes:set|set 0,h]] || [[Z80:Opcodes:set|set 0,l]] || [[Z80:Opcodes:set|set 0,(hl)]] || [[Z80:Opcodes:set|set 0,a]] || [[Z80:Opcodes:set|set 1,b]] || [[Z80:Opcodes:set|set 1,c]] || [[Z80:Opcodes:set|set 1,d]] || [[Z80:Opcodes:set|set 1,e]] || [[Z80:Opcodes:set|set 1,h]] || [[Z80:Opcodes:set|set 1,l]] || [[Z80:Opcodes:set|set 1,(hl)]] || [[Z80:Opcodes:set|set 1,a]]  
+
| C || [[Z80:Opcodes:SET|set 0,b]] || [[Z80:Opcodes:SET|set 0,c]] || [[Z80:Opcodes:SET|set 0,d]] || [[Z80:Opcodes:SET|set 0,e]] || [[Z80:Opcodes:SET|set 0,h]] || [[Z80:Opcodes:SET|set 0,l]] || [[Z80:Opcodes:SET|set 0,(hl)]] || [[Z80:Opcodes:SET|set 0,a]] || [[Z80:Opcodes:SET|set 1,b]] || [[Z80:Opcodes:SET|set 1,c]] || [[Z80:Opcodes:SET|set 1,d]] || [[Z80:Opcodes:SET|set 1,e]] || [[Z80:Opcodes:SET|set 1,h]] || [[Z80:Opcodes:SET|set 1,l]] || [[Z80:Opcodes:SET|set 1,(hl)]] || [[Z80:Opcodes:SET|set 1,a]]  
 
|-
 
|-
! D || [[Z80:Opcodes:set|set 2,b]] || [[Z80:Opcodes:set|set 2,c]] || [[Z80:Opcodes:set|set 2,d]] || [[Z80:Opcodes:set|set 2,e]] || [[Z80:Opcodes:set|set 2,h]] || [[Z80:Opcodes:set|set 2,l]] || [[Z80:Opcodes:set|set 2,(hl)]] || [[Z80:Opcodes:set|set 2,a]] || [[Z80:Opcodes:set|set 3,b]] || [[Z80:Opcodes:set|set 3,c]] || [[Z80:Opcodes:set|set 3,d]] || [[Z80:Opcodes:set|set 3,e]] || [[Z80:Opcodes:set|set 3,h]] || [[Z80:Opcodes:set|set 3,l]] || [[Z80:Opcodes:set|set 3,(hl)]] || [[Z80:Opcodes:set|set 3,a]]  
+
| D || [[Z80:Opcodes:SET|set 2,b]] || [[Z80:Opcodes:SET|set 2,c]] || [[Z80:Opcodes:SET|set 2,d]] || [[Z80:Opcodes:SET|set 2,e]] || [[Z80:Opcodes:SET|set 2,h]] || [[Z80:Opcodes:SET|set 2,l]] || [[Z80:Opcodes:SET|set 2,(hl)]] || [[Z80:Opcodes:SET|set 2,a]] || [[Z80:Opcodes:SET|set 3,b]] || [[Z80:Opcodes:SET|set 3,c]] || [[Z80:Opcodes:SET|set 3,d]] || [[Z80:Opcodes:SET|set 3,e]] || [[Z80:Opcodes:SET|set 3,h]] || [[Z80:Opcodes:SET|set 3,l]] || [[Z80:Opcodes:SET|set 3,(hl)]] || [[Z80:Opcodes:SET|set 3,a]]  
 
|-
 
|-
! E || [[Z80:Opcodes:set|set 4,b]] || [[Z80:Opcodes:set|set 4,c]] || [[Z80:Opcodes:set|set 4,d]] || [[Z80:Opcodes:set|set 4,e]] || [[Z80:Opcodes:set|set 4,h]] || [[Z80:Opcodes:set|set 4,l]] || [[Z80:Opcodes:set|set 4,(hl)]] || [[Z80:Opcodes:set|set 4,a]] || [[Z80:Opcodes:set|set 5,b]] || [[Z80:Opcodes:set|set 5,c]] || [[Z80:Opcodes:set|set 5,d]] || [[Z80:Opcodes:set|set 5,e]] || [[Z80:Opcodes:set|set 5,h]] || [[Z80:Opcodes:set|set 5,l]] || [[Z80:Opcodes:set|set 5,(hl)]] || [[Z80:Opcodes:set|set 5,a]]  
+
| E || [[Z80:Opcodes:SET|set 4,b]] || [[Z80:Opcodes:SET|set 4,c]] || [[Z80:Opcodes:SET|set 4,d]] || [[Z80:Opcodes:SET|set 4,e]] || [[Z80:Opcodes:SET|set 4,h]] || [[Z80:Opcodes:SET|set 4,l]] || [[Z80:Opcodes:SET|set 4,(hl)]] || [[Z80:Opcodes:SET|set 4,a]] || [[Z80:Opcodes:SET|set 5,b]] || [[Z80:Opcodes:SET|set 5,c]] || [[Z80:Opcodes:SET|set 5,d]] || [[Z80:Opcodes:SET|set 5,e]] || [[Z80:Opcodes:SET|set 5,h]] || [[Z80:Opcodes:SET|set 5,l]] || [[Z80:Opcodes:SET|set 5,(hl)]] || [[Z80:Opcodes:SET|set 5,a]]  
 
|-
 
|-
! F || [[Z80:Opcodes:set|set 6,b]] || [[Z80:Opcodes:set|set 6,c]] || [[Z80:Opcodes:set|set 6,d]] || [[Z80:Opcodes:set|set 6,e]] || [[Z80:Opcodes:set|set 6,h]] || [[Z80:Opcodes:set|set 6,l]] || [[Z80:Opcodes:set|set 6,(hl)]] || [[Z80:Opcodes:set|set 6,a]] || [[Z80:Opcodes:set|set 7,b]] || [[Z80:Opcodes:set|set 7,c]] || [[Z80:Opcodes:set|set 7,d]] || [[Z80:Opcodes:set|set 7,e]] || [[Z80:Opcodes:set|set 7,h]] || [[Z80:Opcodes:set|set 7,l]] || [[Z80:Opcodes:set|set 7,(hl)]] || [[Z80:Opcodes:set|set 7,a]]  
+
| F || [[Z80:Opcodes:SET|set 6,b]] || [[Z80:Opcodes:SET|set 6,c]] || [[Z80:Opcodes:SET|set 6,d]] || [[Z80:Opcodes:SET|set 6,e]] || [[Z80:Opcodes:SET|set 6,h]] || [[Z80:Opcodes:SET|set 6,l]] || [[Z80:Opcodes:SET|set 6,(hl)]] || [[Z80:Opcodes:SET|set 6,a]] || [[Z80:Opcodes:SET|set 7,b]] || [[Z80:Opcodes:SET|set 7,c]] || [[Z80:Opcodes:SET|set 7,d]] || [[Z80:Opcodes:SET|set 7,e]] || [[Z80:Opcodes:SET|set 7,h]] || [[Z80:Opcodes:SET|set 7,l]] || [[Z80:Opcodes:SET|set 7,(hl)]] || [[Z80:Opcodes:SET|set 7,a]]  
 
|}
 
|}
  

Latest revision as of 08:19, 6 February 2016

This is an opcode reference chart for on-calculator programming and/or size optimizations.

Rows are first nibble, columns are second.

Primary

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 nop ld bc,xx ld (bc),a inc bc inc b dec b ld b,x rlca ex af,af' add hl,bc ld a,(bc) dec bc inc c dec c ld c,x rrca
1 djnz x ld de,xx ld (de),a inc de inc d dec d ld d,x rla jr x add hl,de ld a,(de) dec de inc e dec e ld e,x rra
2 jr nz,x ld hl,xx ld (xx),hl inc hl inc h dec h ld h,x daa jr z,x add hl,hl ld hl,(xx) dec hl inc l dec l ld l,x cpl
3 jr nc,x ld sp,xx ld (xx),a inc sp inc (hl) dec (hl) ld (hl),x scf jr c,x add hl,sp ld a,(xx) dec sp inc a dec a ld a,x ccf
4 ld b,b ld b,c ld b,d ld b,e ld b,h ld b,l ld b,(hl) ld b,a ld c,b ld c,c ld c,d ld c,e ld c,h ld c,l ld c,(hl) ld c,a
5 ld d,b ld d,c ld d,d ld d,e ld d,h ld d,l ld d,(hl) ld d,a ld e,b ld e,c ld e,d ld e,e ld e,h ld e,l ld e,(hl) ld e,a
6 ld h,b ld h,c ld h,d ld h,e ld h,h ld h,l ld h,(hl) ld h,a ld l,b ld l,c ld l,d ld l,e ld l,h ld l,l ld l,(hl) ld l,a
7 ld (hl),b ld (hl),c ld (hl),d ld (hl),e ld (hl),h ld (hl),l halt ld (hl),a ld a,b ld a,c ld a,d ld a,e ld a,h ld a,l ld a,(hl) ld a,a
8 add a,b add a,c add a,d add a,e add a,h add a,l add a,(hl) add a,a adc a,b adc a,c adc a,d adc a,e adc a,h adc a,l adc a,(hl) adc a,a
9 sub b sub c sub d sub e sub h sub l sub (hl) sub a sbc a,b sbc a,c sbc a,d sbc a,e sbc a,h sbc a,l sbc a,(hl) sbc a,a
A and b and c and d and e and h and l and (hl) and a xor b xor c xor d xor e xor h xor l xor (hl) xor a
B or b or c or d or e or h or l or (hl) or a cp b cp c cp d cp e cp h cp l cp (hl) cp a
C ret nz pop bc jp nz,xx jp xx call nz,xx push bc add a,x rst 00h ret z ret jp z,xx xxBITxx call z,xx call xx adc a,x rst 08h
D ret nc pop de jp nc,xx out (x),a call nc,xx push de sub x rst 10h ret c exx jp c,xx in a,(x) call c,xx xxIXxx sbc a,x rst 18h
E ret po pop hl jp po,xx ex (sp),hl call po,xx push hl and x rst 20h ret pe jp (hl) jp pe,xx ex de,hl call pe,xx xx80xx xor x rst 28h
F ret p pop af jp p,xx di call p,xx push af or x rst 30h ret m ld sp,hl jp m,xx ei call m,xx xxIYxx cp x rst 38h

xx80xx (ED)

0 1 2 3 4 5 6 7 8 9 A B C D E F
4 in b,(c) out (c),b sbc hl,bc ld (xx),bc neg retn im 0 ld i,a in c,(c) out (c),c adc hl,bc ld bc,(xx) neg reti ld r,a
5 in d,(c) out (c),d sbc hl,de ld (xx),de neg retn im 1 ld a,i in e,(c) out (c),e adc hl,de ld de,(xx) neg retn im 2 ld a,r
6 in h,(c) out (c),h sbc hl,hl ld (xx),hl neg retn rrd in l,(c) out (c),l adc hl,hl ld hl,(xx) neg retn rld
7 in f,(c) out (c),f sbc hl,sp ld (xx),sp neg retn in a,(c) out (c),a adc hl,sp ld sp,(xx) neg reti
A ldi cpi ini outi ldd cpd ind outd
B ldir cpir inir otir lddr cpdr indr otdr

xxBITxx (CB)

Blank spaces or spaces not listed function like NOP.

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 rlc b rlc c rlc d rlc e rlc h rlc l rlc (hl) rlc a rrc b rrc c rrc d rrc e rrc h rrc l rrc (hl) rrc a
1 rl b rl c rl d rl e rl h rl l rl (hl) rl a rr b rr c rr d rr e rr h rr l rr (hl) rr a
2 sla b sla c sla d sla e sla h sla l sla (hl) sla a sra b sra c sra d sra e sra h sra l sra (hl) sra a
3 sll b sll c sll d sll e sll h sll l sll (hl) sll a srl b srl c srl d srl e srl h srl l srl (hl) srl a
4 bit 0,b bit 0,c bit 0,d bit 0,e bit 0,h bit 0,l bit 0,(hl) bit 0,a bit 1,b bit 1,c bit 1,d bit 1,e bit 1,h bit 1,l bit 1,(hl) bit 1,a
5 bit 2,b bit 2,c bit 2,d bit 2,e bit 2,h bit 2,l bit 2,(hl) bit 2,a bit 3,b bit 3,c bit 3,d bit 3,e bit 3,h bit 3,l bit 3,(hl) bit 3,a
6 bit 4,b bit 4,c bit 4,d bit 4,e bit 4,h bit 4,l bit 4,(hl) bit 4,a bit 5,b bit 5,c bit 5,d bit 5,e bit 5,h bit 5,l bit 5,(hl) bit 5,a
7 bit 6,b bit 6,c bit 6,d bit 6,e bit 6,h bit 6,l bit 6,(hl) bit 6,a bit 7,b bit 7,c bit 7,d bit 7,e bit 7,h bit 7,l bit 7,(hl) bit 7,a
8 res 0,b res 0,c res 0,d res 0,e res 0,h res 0,l res 0,(hl) res 0,a res 1,b res 1,c res 1,d res 1,e res 1,h res 1,l res 1,(hl) res 1,a
9 res 2,b res 2,c res 2,d res 2,e res 2,h res 2,l res 2,(hl) res 2,a res 3,b res 3,c res 3,d res 3,e res 3,h res 3,l res 3,(hl) res 3,a
A res 4,b res 4,c res 4,d res 4,e res 4,h res 4,l res 4,(hl) res 4,a res 5,b res 5,c res 5,d res 5,e res 5,h res 5,l res 5,(hl) res 5,a
B res 6,b res 6,c res 6,d res 6,e res 6,h res 6,l res 6,(hl) res 6,a res 7,b res 7,c res 7,d res 7,e res 7,h res 7,l res 7,(hl) res 7,a
C set 0,b set 0,c set 0,d set 0,e set 0,h set 0,l set 0,(hl) set 0,a set 1,b set 1,c set 1,d set 1,e set 1,h set 1,l set 1,(hl) set 1,a
D set 2,b set 2,c set 2,d set 2,e set 2,h set 2,l set 2,(hl) set 2,a set 3,b set 3,c set 3,d set 3,e set 3,h set 3,l set 3,(hl) set 3,a
E set 4,b set 4,c set 4,d set 4,e set 4,h set 4,l set 4,(hl) set 4,a set 5,b set 5,c set 5,d set 5,e set 5,h set 5,l set 5,(hl) set 5,a
F set 6,b set 6,c set 6,d set 6,e set 6,h set 6,l set 6,(hl) set 6,a set 7,b set 7,c set 7,d set 7,e set 7,h set 7,l set 7,(hl) set 7,a

xxIXxx (DD)

If the next byte is CB, it will follow xxIXBITxx, described later below. If the next byte is DD, ED, or FD, the current DD (the xxIXxx) will be ignored (functions like NOP).

Functions like the primary table, except each instance of hl is replaced with ix, h with ixh, and l with ixl, except in the case of (hl). (hl) will be replaced by (ix+x), where x is an 8-bit displacement, and all other h and l are unaffected. For example, ld ixh, (ix+x) is not an instruction, but ld h, (ix+x) is.

xxIYxx (FD)

Same as xxIXxx, but instead with IY, IYH, and IYL.

xxIXBITxx (DDCB)

Functions like xxBITxx, but instead applying the bitwise operations to (ix+x), then if the instruction wasn't BIT return the result to the register if it is not (hl). For example, rlc b becomes rlc (ix+x)->b.

xxIYBITxx (FDCB)

Same as xxIXBITxx, but instead with IY, IYH, and IYL.

Additional Information

Most of the instructions have more information here, or click on the instruction.

Source: Primary, xx80xx, xxBITxx: Xeda Elnara, aka Zeda xxIXxx, xxIYxx, xxIXBITxx, xxIYBITxx: www.z80.info/decoding.htm