Z80:Ports:Port04 - Revision history

KermMartian at 08:10, 6 February 2016

2016-02-06T08:10:57Z

KermMartian at 08:09, 6 February 2016

2016-02-06T08:09:00Z

← Older revision		Revision as of 08:09, 6 February 2016
Line 34:		Line 34:
	* '''83+SE / 84+ only:''' Bit 7: Third crystal timer has expired.		* '''83+SE / 84+ only:''' Bit 7: Third crystal timer has expired.
	Bit 3 is reset if the ON key is being pressed, set otherwise.		Bit 3 is reset if the ON key is being pressed, set otherwise.

	~~[[Z80:=\|=]]~~
	~~'''Frequency (Hz)'''~~
	~~[[Z80:/=\|/=]]~~

	{\| class="wikitable"		{\| class="wikitable"
	\| \|\|!! First Timer \|~~\|!!~~ Second Timer\|~~\|!!~~ Both Enabled		\|+ '''Frequency (Hz)'''
			!
			! colspan="2" \| First Timer
			! colspan="2" \| Second Timer
			! colspan="2" \| Both Enabled
	\|-		\|-
	! value !! 83+ !! 83+SE 84+(SE) !! 83+ !! 83+SE 84+(SE) !! 83+ !! 83+SE 84+(SE)		! value !! 83+ !! 83+SE 84+(SE) !! 83+ !! 83+SE 84+(SE) !! 83+ !! 83+SE 84+(SE)
	\|-		\|-
	! 00 \|\| 560 \|\| 512 \|\| 1120 \|\| 1024 \|\| 1680 \|\| 1536		\| 00 \|\| 560 \|\| 512 \|\| 1120 \|\| 1024 \|\| 1680 \|\| 1536
	\|-		\|-
	! 01 \|\| 248 \|\| 227.55 \|\| 497 \|\| 455.11 \|\| 746 \|\| 682.66		\| 01 \|\| 248 \|\| 227.55 \|\| 497 \|\| 455.11 \|\| 746 \|\| 682.66
	\|-		\|-
	! 10 \|\| 170 \|\| 146.29 \|\| 344 \|\| 292.57 \|\| 517 \|\| 438.86		\| 10 \|\| 170 \|\| 146.29 \|\| 344 \|\| 292.57 \|\| 517 \|\| 438.86
	\|-		\|-
	! 11 \|\| 118 \|\| 107.79 \|\| 236 \|\| 215.58 \|\| 353 \|\| 323.37		\| 11 \|\| 118 \|\| 107.79 \|\| 236 \|\| 215.58 \|\| 353 \|\| 323.37
	\|}		\|}

Line 59:		Line 59:
	** '''TI-83+SE:''' Only has one bit, bit 7; the second bit was added for the 84-series.		** '''TI-83+SE:''' Only has one bit, bit 7; the second bit was added for the 84-series.
	** '''TI-84+/SE:''' Numbers 00 and 10 are not currently used. 01 measures if the batteries are removed (0v). 11 measures if the main batteries are present but "low".		** '''TI-84+/SE:''' Numbers 00 and 10 are not currently used. 01 measures if the batteries are removed (0v). 11 measures if the main batteries are present but "low".
	** '''I-84+CSE:''' Based on the OS battery check routine, these two bits are in reverse order; that is, bit 6 is more significant than bit 7. (This probably also applies to the B&W models.) The routine always delays between changing these bits and checking bit 0 of [[Z80:Ports:port02\|port02]]. Also, for each check value, it writes 06 (i.e. resets the port) and then writes the value it intends to write. It writes, in order, 06, 86, 46, C6. If bit 0 of [[Z80:Ports:port02\|port02]] is reset after any of those writes, it returns 0 through 3, respectively; if bit 0 of [[Z80:Ports:port02\|port02]] remains set after all of those writes, it returns 4. Bit 7 of [[Z80:Ports:port3A\|port3A]] is also related; that bit is normally kept reset, but is set for the duration of the test routine.		** '''TI-84+CSE:''' Based on the OS battery check routine, these two bits are in reverse order; that is, bit 6 is more significant than bit 7. (This probably also applies to the B&W models.) The routine always delays between changing these bits and checking bit 0 of [[Z80:Ports:port02\|port02]]. Also, for each check value, it writes 06 (i.e. resets the port) and then writes the value it intends to write. It writes, in order, 06, 86, 46, C6. If bit 0 of [[Z80:Ports:port02\|port02]] is reset after any of those writes, it returns 0 through 3, respectively; if bit 0 of [[Z80:Ports:port02\|port02]] remains set after all of those writes, it returns 4. Bit 7 of [[Z80:Ports:port3A\|port3A]] is also related; that bit is normally kept reset, but is set for the duration of the test routine.

	= Comments =		= Comments =

KermMartian: KermMartian moved page Z80:Ports:Ports04 to Z80:Ports:Port04

2016-02-06T07:22:27Z

KermMartian moved page Z80:Ports:Ports04 to Z80:Ports:Port04

← Older revision	Revision as of 07:22, 6 February 2016
(No difference)

Maintenance script: Initial automated import

2016-02-06T06:17:14Z

Initial automated import

New page

= Basic Info =

'''Port Address: 04'''

Interrupting Device Identification and Memory Map Control

This port serves two purposes. When read it indicates the device that triggered an interrupt. When written it sets the memory map mode and hardware timer speed. When an interrupt is triggered, it should be cleared by resetting the corresponding bit in [[Z80:Ports:port03|port03]]. Otherwise, it will continuously call the interrupt code once interrupts are reenabled with [[Z80:Opcodes:EI|EI]].

= Writing to Port =

Bit 0 reset to select memory map mode 0. In mode 0 the RAM and ROM is mapped to CPU memory as follows:
* Address 0000h ~ 3FFFh: ROM Page 0
* Address 4000h ~ 7FFFh: Memory Bank A (Page selected in [[Z80:Ports:port06|port06]])
* Address 8000h ~ BFFFh: Memory Bank B (Page selected in [[Z80:Ports:port07|port07]])
* '''83+ Basic:''' Address C000h ~ FFFFh: RAM Page 0
* '''Everything else:''' Address C000h ~ FFFFh: Page selected in [[Z80:Ports:port05|port05]]
Bit 0 set to select memory map mode 1. In mode 1 the RAM and ROM is mapped to CPU memory as follows:
* Address 0000h ~ 3FFFh: ROM Page 0
* Address 4000h ~ 7FFFh: Memory Bank A, even page (value of [[Z80:Ports:port06|port06]] ANDed with FEh)
* '''83+ Basic:''' Address 8000h ~ BFFFh: Memory Bank A (Page selected in [[Z80:Ports:port06|port06]])
* '''Everything else:''' Address 8000h ~ BFFFh: Memory Bank A, odd page (value of [[Z80:Ports:port06|port06]] ORed with 1)
* Address C000h ~ FFFFh: Memory Bank B (Page selected in [[Z80:Ports:port07|port07]])
Bits 1 and 2 control the hardware timer frequency. Setting both 0 sets the timer to the fastest speed, and both 1 is the slowest speed. The normal speed is with both bits 1.

= Reading from Port =

Bits 0~2 and 4~7 are set according to which device triggered the running interrupt.
* Bit 0: Set if pressing the ON Key triggered the interrupt.
* Bit 1: Set if the first hardware timer triggered the interrupt.
* Bit 2: Set if the second hardware timer triggered the interrupt.
* Bit 4: Link activity generated an interrupt.
* '''83+SE / 84+ only:''' Bit 5: First crystal timer has expired.
* '''83+SE / 84+ only:''' Bit 6: Second crystal timer has expired.
* '''83+SE / 84+ only:''' Bit 7: Third crystal timer has expired.
Bit 3 is reset if the ON key is being pressed, set otherwise.

[[Z80:=|=]]
'''Frequency (Hz)'''
[[Z80:/=|/=]]

{| class="wikitable"
| ||!! First Timer ||!! Second Timer||!! Both Enabled
|-
! value !! 83+ !! 83+SE 84+(SE) !! 83+ !! 83+SE 84+(SE) !! 83+ !! 83+SE 84+(SE)
|-
! 00 || 560 || 512 || 1120 || 1024 || 1680 || 1536
|-
! 01 || 248 || 227.55 || 497 || 455.11 || 746 || 682.66
|-
! 10 || 170 || 146.29 || 344 || 292.57 || 517 || 438.86
|-
! 11 || 118 || 107.79 || 236 || 215.58 || 353 || 323.37
|}

Bits 3~5: Unused.
Bits 6 and 7:
* 83+ Basic: No function
* '''Everything else:''' These two bits are used to determine the battery state. They act as a 2-bit number and the higher it is, the higher the voltage cutoff for bit 0 of [[Z80:Ports:port02|port02]]. Unless you are trying to determine battery state, these two bits should be zero.
** '''TI-83+SE:''' Only has one bit, bit 7; the second bit was added for the 84-series.
** '''TI-84+/SE:''' Numbers 00 and 10 are not currently used. 01 measures if the batteries are removed (0v). 11 measures if the main batteries are present but "low".
** '''I-84+CSE:''' Based on the OS battery check routine, these two bits are in reverse order; that is, bit 6 is more significant than bit 7. (This probably also applies to the B&W models.) The routine always delays between changing these bits and checking bit 0 of [[Z80:Ports:port02|port02]]. Also, for each check value, it writes 06 (i.e. resets the port) and then writes the value it intends to write. It writes, in order, 06, 86, 46, C6. If bit 0 of [[Z80:Ports:port02|port02]] is reset after any of those writes, it returns 0 through 3, respectively; if bit 0 of [[Z80:Ports:port02|port02]] remains set after all of those writes, it returns 4. Bit 7 of [[Z80:Ports:port3A|port3A]] is also related; that bit is normally kept reset, but is set for the duration of the test routine.

= Comments =
The calculator uses memory mapping mode 0 for normal operation. If you change the memory map mode be sure to change it back before returning control. Also, do not switch from mode 0 to mode 1 inside the 4000h ~ 7FFFh range unless you've changed the RAM Execution Limits with [[Z80:Ports:port25|port25]] and [[Z80:Ports:port26|port26]]. This is because switching modes in this manner will start executing on RAM page 0, which will crash under normal conditions.
Interrupt timers may not be independent of the CPU speed for the 83+. However on the 83+SE, 84+ and 84+SE the standard timers are based on the crystal timer. Timer1 fires at 32768/(64+(80*i))hz, where i is bit 1 and 2 set in [[Z80:Ports:port04|port04]], making it 0<=i<=3.

= Example Uses =

This example shows successful use of this port, switching to mode 1 and back. Mode 1 is the only way to execute code beyond address C000h on the 83+ Basic, unless you use a combination of ports [[Z80:Ports:port05|port05]] and [[Z80:Ports:port16|port16]] to enable execution on RAM page 00. (Assumes code is running from 4000h (i.e. an application))

in a, (7) ;Save current Bank B page because we'll trash it.
push af
in a,(6) ;Put this app's page into 8000
out (7), a
jp $ + 4003h ;This will actually jump to the next statement, but in Bank B.
ld a, 77h ;Select mode 1 and keep the timer speed at normal...
out (4), a ;Now we're in mode 1.
;We're still at 8000h here but we are back in Bank A.
;Now to go back.
ld a, 76h ;I could dec a for this example, but...
out (4), a ;Back in mode 0 and bank B.
jp $ - 3FFDh ;Jump back to bank A.
pop af
out (7), a ;Restore bank B.

------

{{lowercase}}
[[Category:Z80 Assembly]]
[[Category:Z80 Heaven]]
[[Category:Z80 Ports]]

← Older revision		Revision as of 08:10, 6 February 2016
Line 5:		Line 5:
	Interrupting Device Identification and Memory Map Control		Interrupting Device Identification and Memory Map Control

	This port serves two purposes. When read it indicates the device that triggered an interrupt. When written it sets the memory map mode and hardware timer speed. When an interrupt is triggered, it should be cleared by resetting the corresponding bit in [[Z80:Ports:~~port03~~\|port03]]. Otherwise, it will continuously call the interrupt code once interrupts are reenabled with [[Z80:Opcodes:EI\|EI]].		This port serves two purposes. When read it indicates the device that triggered an interrupt. When written it sets the memory map mode and hardware timer speed. When an interrupt is triggered, it should be cleared by resetting the corresponding bit in [[Z80:Ports:Port03\|port03]]. Otherwise, it will continuously call the interrupt code once interrupts are reenabled with [[Z80:Opcodes:EI\|EI]].

	= Writing to Port =		= Writing to Port =
Line 11:		Line 11:
	Bit 0 reset to select memory map mode 0. In mode 0 the RAM and ROM is mapped to CPU memory as follows:		Bit 0 reset to select memory map mode 0. In mode 0 the RAM and ROM is mapped to CPU memory as follows:
	* Address 0000h ~ 3FFFh: ROM Page 0		* Address 0000h ~ 3FFFh: ROM Page 0
	* Address 4000h ~ 7FFFh: Memory Bank A (Page selected in [[Z80:Ports:~~port06~~\|port06]])		* Address 4000h ~ 7FFFh: Memory Bank A (Page selected in [[Z80:Ports:Port06\|port06]])
	* Address 8000h ~ BFFFh: Memory Bank B (Page selected in [[Z80:Ports:~~port07~~\|port07]])		* Address 8000h ~ BFFFh: Memory Bank B (Page selected in [[Z80:Ports:Port07\|port07]])
	* '''83+ Basic:''' Address C000h ~ FFFFh: RAM Page 0		* '''83+ Basic:''' Address C000h ~ FFFFh: RAM Page 0
	* '''Everything else:''' Address C000h ~ FFFFh: Page selected in [[Z80:Ports:~~port05~~\|port05]]		* '''Everything else:''' Address C000h ~ FFFFh: Page selected in [[Z80:Ports:Port05\|port05]]
	Bit 0 set to select memory map mode 1. In mode 1 the RAM and ROM is mapped to CPU memory as follows:		Bit 0 set to select memory map mode 1. In mode 1 the RAM and ROM is mapped to CPU memory as follows:
	* Address 0000h ~ 3FFFh: ROM Page 0		* Address 0000h ~ 3FFFh: ROM Page 0
	* Address 4000h ~ 7FFFh: Memory Bank A, even page (value of [[Z80:Ports:~~port06~~\|port06]] ANDed with FEh)		* Address 4000h ~ 7FFFh: Memory Bank A, even page (value of [[Z80:Ports:Port06\|port06]] ANDed with FEh)
	* '''83+ Basic:''' Address 8000h ~ BFFFh: Memory Bank A (Page selected in [[Z80:Ports:~~port06~~\|port06]])		* '''83+ Basic:''' Address 8000h ~ BFFFh: Memory Bank A (Page selected in [[Z80:Ports:Port06\|port06]])
	* '''Everything else:''' Address 8000h ~ BFFFh: Memory Bank A, odd page (value of [[Z80:Ports:~~port06~~\|port06]] ORed with 1)		* '''Everything else:''' Address 8000h ~ BFFFh: Memory Bank A, odd page (value of [[Z80:Ports:Port06\|port06]] ORed with 1)
	* Address C000h ~ FFFFh: Memory Bank B (Page selected in [[Z80:Ports:~~port07~~\|port07]])		* Address C000h ~ FFFFh: Memory Bank B (Page selected in [[Z80:Ports:Port07\|port07]])
	Bits 1 and 2 control the hardware timer frequency. Setting both 0 sets the timer to the fastest speed, and both 1 is the slowest speed. The normal speed is with both bits 1.		Bits 1 and 2 control the hardware timer frequency. Setting both 0 sets the timer to the fastest speed, and both 1 is the slowest speed. The normal speed is with both bits 1.

Line 56:		Line 56:
	Bits 6 and 7:		Bits 6 and 7:
	* 83+ Basic: No function		* 83+ Basic: No function
	* '''Everything else:''' These two bits are used to determine the battery state. They act as a 2-bit number and the higher it is, the higher the voltage cutoff for bit 0 of [[Z80:Ports:~~port02~~\|port02]]. Unless you are trying to determine battery state, these two bits should be zero.		* '''Everything else:''' These two bits are used to determine the battery state. They act as a 2-bit number and the higher it is, the higher the voltage cutoff for bit 0 of [[Z80:Ports:Port02\|port02]]. Unless you are trying to determine battery state, these two bits should be zero.
	** '''TI-83+SE:''' Only has one bit, bit 7; the second bit was added for the 84-series.		** '''TI-83+SE:''' Only has one bit, bit 7; the second bit was added for the 84-series.
	** '''TI-84+/SE:''' Numbers 00 and 10 are not currently used. 01 measures if the batteries are removed (0v). 11 measures if the main batteries are present but "low".		** '''TI-84+/SE:''' Numbers 00 and 10 are not currently used. 01 measures if the batteries are removed (0v). 11 measures if the main batteries are present but "low".
	** '''TI-84+CSE:''' Based on the OS battery check routine, these two bits are in reverse order; that is, bit 6 is more significant than bit 7. (This probably also applies to the B&W models.) The routine always delays between changing these bits and checking bit 0 of [[Z80:Ports:~~port02~~\|port02]]. Also, for each check value, it writes 06 (i.e. resets the port) and then writes the value it intends to write. It writes, in order, 06, 86, 46, C6. If bit 0 of [[Z80:Ports:~~port02~~\|port02]] is reset after any of those writes, it returns 0 through 3, respectively; if bit 0 of [[Z80:Ports:~~port02~~\|port02]] remains set after all of those writes, it returns 4. Bit 7 of [[Z80:Ports:~~port3A~~\|port3A]] is also related; that bit is normally kept reset, but is set for the duration of the test routine.		** '''TI-84+CSE:''' Based on the OS battery check routine, these two bits are in reverse order; that is, bit 6 is more significant than bit 7. (This probably also applies to the B&W models.) The routine always delays between changing these bits and checking bit 0 of [[Z80:Ports:Port02\|port02]]. Also, for each check value, it writes 06 (i.e. resets the port) and then writes the value it intends to write. It writes, in order, 06, 86, 46, C6. If bit 0 of [[Z80:Ports:Port02\|port02]] is reset after any of those writes, it returns 0 through 3, respectively; if bit 0 of [[Z80:Ports:Port02\|port02]] remains set after all of those writes, it returns 4. Bit 7 of [[Z80:Ports:Port3A\|port3A]] is also related; that bit is normally kept reset, but is set for the duration of the test routine.

	= Comments =		= Comments =
	The calculator uses memory mapping mode 0 for normal operation. If you change the memory map mode be sure to change it back before returning control. Also, do not switch from mode 0 to mode 1 inside the 4000h ~ 7FFFh range unless you've changed the RAM Execution Limits with [[Z80:Ports:~~port25~~\|port25]] and [[Z80:Ports:~~port26~~\|port26]]. This is because switching modes in this manner will start executing on RAM page 0, which will crash under normal conditions.		The calculator uses memory mapping mode 0 for normal operation. If you change the memory map mode be sure to change it back before returning control. Also, do not switch from mode 0 to mode 1 inside the 4000h ~ 7FFFh range unless you've changed the RAM Execution Limits with [[Z80:Ports:Port25\|port25]] and [[Z80:Ports:Port26\|port26]]. This is because switching modes in this manner will start executing on RAM page 0, which will crash under normal conditions.
	Interrupt timers may not be independent of the CPU speed for the 83+. However on the 83+SE, 84+ and 84+SE the standard timers are based on the crystal timer. Timer1 fires at 32768/(64+(80*i))hz, where i is bit 1 and 2 set in [[Z80:Ports:~~port04~~\|port04]], making it 0<=i<=3.		Interrupt timers may not be independent of the CPU speed for the 83+. However on the 83+SE, 84+ and 84+SE the standard timers are based on the crystal timer. Timer1 fires at 32768/(64+(80*i))hz, where i is bit 1 and 2 set in [[Z80:Ports:Port04\|port04]], making it 0<=i<=3.

	= Example Uses =		= Example Uses =

	This example shows successful use of this port, switching to mode 1 and back. Mode 1 is the only way to execute code beyond address C000h on the 83+ Basic, unless you use a combination of ports [[Z80:Ports:~~port05~~\|port05]] and [[Z80:Ports:~~port16~~\|port16]] to enable execution on RAM page 00. (Assumes code is running from 4000h (i.e. an application))		This example shows successful use of this port, switching to mode 1 and back. Mode 1 is the only way to execute code beyond address C000h on the 83+ Basic, unless you use a combination of ports [[Z80:Ports:Port05\|port05]] and [[Z80:Ports:Port16\|port16]] to enable execution on RAM page 00. (Assumes code is running from 4000h (i.e. an application))