http://learn.cemetech.net/index.php?action=history&feed=atom&title=Z80%3AOpcodes%3ARRZ80:Opcodes:RR - Revision history2026-05-13T12:21:12ZRevision history for this page on the wikiMediaWiki 1.43.3http://learn.cemetech.net/index.php?title=Z80:Opcodes:RR&diff=276&oldid=prevMaintenance script: Initial automated import2016-02-05T22:08:48Z<p>Initial automated import</p>
<p><b>New page</b></p><div><!-- Short summary of instruction --><br />
9-bit rotation to the right. The carry is copied into bit 7, and the bit leaving on the right is copied into the carry.<br />
<br />
== Syntax ==<br />
<br />
<!-- Syntax for this instruction --><br />
<br />
RR op8<br />
<br />
=== Allowed Instructions ===<br />
<br />
<!-- All possible inputs --><br />
<br />
RR A<br />
RR B<br />
RR C<br />
RR D<br />
RR E<br />
RR H<br />
RR L<br />
RR (HL)<br />
RR (IX+n)<br />
RR (IY+n)<br />
<br />
== Effects ==<br />
<br />
<!-- What the instruction does to flags --><br />
Carry becomes the bit leaving on the right, H and N flags are reset, P/V is parity, S and Z are modified by definition.<br />
<br />
== Uses ==<br />
<br />
<!-- What the instruction can be used for --><br />
== T-States ==<br />
r denotes 8-bit register.<br />
{| class="wikitable"<br />
| r || 8 <br />
|-<br />
| (hl) || 15 <br />
|-<br />
| (ix+X) || 23 <br />
|-<br />
| (iy+X) || 23 <br />
|}<br />
== See Also ==<br />
<br />
<!-- Other instructions that are related to this one --><br />
[[Z80:Opcodes:RL|RL]],[[Z80:Opcodes:RLA|RLA]],[[Z80:Opcodes:RLC|RLC]],[[Z80:Opcodes:RLCA|RLCA]],[[Z80:Opcodes:RLD|RLD]],[[Z80:Opcodes:RRA|RRA]],[[Z80:Opcodes:RRC|RRC]],[[Z80:Opcodes:RRCA|RRCA]],[[Z80:Opcodes:RRD|RRD]],[[Z80:Opcodes:SLA|SLA]],[[Z80:Opcodes:SLL|SLL/SL1]],[[Z80:Opcodes:SRA|SRA]],[[Z80:Opcodes:SRL|SRL]]<br />
<br />
{{lowercase}}<br />
[[Category:Z80 Assembly]]<br />
[[Category:Z80 Heaven]]<br />
[[Category:Z80 Opcodes]]</div>Maintenance script