http://learn.cemetech.net/index.php?action=history&feed=atom&title=Z80%3AOpcodes%3ADECZ80:Opcodes:DEC - Revision history2026-05-02T13:01:39ZRevision history for this page on the wikiMediaWiki 1.43.3http://learn.cemetech.net/index.php?title=Z80:Opcodes:DEC&diff=306&oldid=prevMaintenance script: Initial automated import2016-02-05T22:30:38Z<p>Initial automated import</p>
<p><b>New page</b></p><div><!-- Short summary of instruction --><br />
Decreases operand by one.<br />
<br />
== Syntax ==<br />
<br />
<!-- Syntax for this instruction --><br />
<br />
dec op8 ;8 bits<br />
dec op16 ;16 bits<br />
<br />
=== Allowed Instructions ===<br />
<br />
<!-- All possible inputs --><br />
<br />
dec a<br />
dec b<br />
dec c<br />
dec d<br />
dec e<br />
dec h<br />
dec l<br />
dec ixh<br />
dec ixl<br />
dec iyh<br />
dec iyl<br />
dec (hl)<br />
dec (ix+n)<br />
dec (iy+n)<br />
<br />
dec bc<br />
dec de<br />
dec hl<br />
dec ix<br />
dec iy<br />
dec sp<br />
<br />
== Effects ==<br />
<br />
<!-- What the instruction does to flags --><br />
'''8 Bits'''<br />
C flag preserved, P/V detects overflow and rest modified by definition.<br />
<br />
'''16 Bits'''<br />
No flags altered.<br />
<br />
== Uses ==<br />
<br />
<!-- What the instruction can be used for --><br />
<br />
== T-States ==<br />
r denotes 8-bit register.<br />
rr represents a two byte register pair: BC, DE, HL, SP<br />
<br />
{| class="wikitable"<br />
| r || 4 <br />
|-<br />
| (hl) || 11 <br />
|-<br />
| (ix+X) || 23 <br />
|-<br />
| (iy+X) || 23 <br />
|-<br />
| rr || 6 <br />
|-<br />
| ix || 10 <br />
|-<br />
| iy || 10 <br />
|}<br />
<br />
== See Also ==<br />
<br />
<!-- Other instructions that are related to this one --><br />
[[Z80:Opcodes:ADC|ADC]],[[Z80:Opcodes:ADD|ADD]],[[Z80:Opcodes:DAA|DAA]],[[Z80:Opcodes:INC|INC]],[[Z80:Opcodes:SBC|SBC]],[[Z80:Opcodes:SUB|SUB]]<br />
<br />
{{lowercase}}<br />
[[Category:Z80 Assembly]]<br />
[[Category:Z80 Heaven]]<br />
[[Category:Z80 Opcodes]]</div>Maintenance script