http://learn.cemetech.net/index.php?action=history&feed=atom&title=Z80%3AOpcodes%3AADC 2026-05-02T13:02:47Z Revision history for this page on the wiki MediaWiki 1.43.3 http://learn.cemetech.net/index.php?title=Z80:Opcodes:ADC&diff=322&oldid=prev 2016-02-05T22:39:34Z

<p>Initial automated import</p> <p><b>New page</b></p><div>The sum of the two operands plus the carry flag (0 or 1) is calculated, and the result is written back into the first operand.<br /> <br /> == Syntax ==<br /> <br /> adc a,op8 ;8 bit<br /> adc hl,op16 ;16 bit<br /> <br /> === Allowed instructions ===<br /> <br /> adc a,a<br /> adc a,b<br /> adc a,c<br /> adc a,d<br /> adc a,e<br /> adc a,h<br /> adc a,l<br /> adc a,ixh<br /> adc a,ixl<br /> adc a,iyh<br /> adc a,iyl<br /> adc a,(hl)<br /> adc a,(ix+n)<br /> adc a,(iy+n)<br /> adc a,n ;(8-bit number)<br /> <br /> adc hl,bc<br /> adc hl,de<br /> adc hl,hl<br /> adc hl,sp<br /> <br /> == Effects ==<br /> <br /> The N flag is reset, P/V is interpreted as overflow. The rest of the flags is modified by definition. In the case of 16-bit addition the H flag is undefined.<br /> <br /> == Uses ==<br /> <br /> Multiple precision adding<br /> <br /> == T-States ==<br /> <br /> r denotes 8-bit register.<br /> rr represents a two byte register pair: BC, DE, HL, SP<br /> {| class=&quot;wikitable&quot;<br /> | a, r || 4 <br /> |-<br /> | a, X || 7 <br /> |-<br /> | a, (hl) || 7 <br /> |-<br /> | a, (ix+X) || 19 <br /> |-<br /> | a, (iy+X) || 19 <br /> |-<br /> | hl, rr || 15 <br /> |}<br /> <br /> == See also ==<br /> <br /> [[Z80:Opcodes:ADD|ADD]],[[Z80:Opcodes:DAA|DAA]],[[Z80:Opcodes:DEC|DEC]],[[Z80:Opcodes:INC|INC]],[[Z80:Opcodes:SBC|SBC]],[[Z80:Opcodes:SUB|SUB]]<br /> <br /> {{lowercase}}<br /> [[Category:Z80 Assembly]]<br /> [[Category:Z80 Heaven]]<br /> [[Category:Z80 Opcodes]]</div>

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