Difference between revisions of "Z80:Opcodes:SRL"
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Latest revision as of 22:28, 5 February 2016
Like SRA, except a 0 is put into bit 7. The bits are all shifted right, with bit 0 put into the carry flag.
Syntax
SRL A SRL B SRL C SRL D SRL E SRL H SRL L SRL (HL) SRL (IX+d) SRL (IY+d)
Allowed Instructions
Effects
S, H, and N flags reset, Z if result is zero, P/V set if parity is even, C from bit 0.
Uses
T-States
r denotes 8-bit register.
| r | 8 |
| (hl) | 15 |
| (ix+X) | 23 |
| (iy+X) | 23 |
See Also
RL,RLA,RLC,RLCA,RLD,RR,RRA,RRC,RRCA,RRD,SLA,SLL/SL1,SRA
