Difference between revisions of "Z80:Opcodes:ADC"
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Latest revision as of 22:39, 5 February 2016
The sum of the two operands plus the carry flag (0 or 1) is calculated, and the result is written back into the first operand.
Syntax
adc a,op8 ;8 bit adc hl,op16 ;16 bit
Allowed instructions
adc a,a adc a,b adc a,c adc a,d adc a,e adc a,h adc a,l adc a,ixh adc a,ixl adc a,iyh adc a,iyl adc a,(hl) adc a,(ix+n) adc a,(iy+n) adc a,n ;(8-bit number) adc hl,bc adc hl,de adc hl,hl adc hl,sp
Effects
The N flag is reset, P/V is interpreted as overflow. The rest of the flags is modified by definition. In the case of 16-bit addition the H flag is undefined.
Uses
Multiple precision adding
T-States
r denotes 8-bit register. rr represents a two byte register pair: BC, DE, HL, SP
a, r | 4 |
a, X | 7 |
a, (hl) | 7 |
a, (ix+X) | 19 |
a, (iy+X) | 19 |
hl, rr | 15 |
See also